Re: [PATCH v2 7/9] x86/irq: WARN_ONCE() if irq_move_cleanup is called on a pending interrupt

From: H. Peter Anvin
Date: Sat May 15 2021 - 02:25:29 EST


Ugh... I could swear I had fixed the patch description.

On May 14, 2021 6:43:59 PM PDT, "H. Peter Anvin" <hpa@xxxxxxxxx> wrote:
>From: "H. Peter Anvin (Intel)" <hpa@xxxxxxxxx>
>
>The current IRQ vector allocation code should be "clean" and never
>issue a IRQ_MOVE_CLEANUP_VECTOR IPI for an interrupt that could still
>be pending. This should make it possible to move it to the "normal"
>system IRQ vector range. This should probably be a three-step process:
>
>1. Introduce this WARN_ONCE() on this event ever occurring.
>2. Move the IRQ_MOVE_CLEANUP_VECTOR to the sysvec range.
>3. Remove the self-IPI hack.
>
>This implements step 1.
>
>Suggested-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
>Signed-off-by: H. Peter Anvin (Intel) <hpa@xxxxxxxxx>
>---
> arch/x86/kernel/apic/vector.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
>diff --git a/arch/x86/kernel/apic/vector.c
>b/arch/x86/kernel/apic/vector.c
>index 6dbdc7c22bb7..7ba2982a3585 100644
>--- a/arch/x86/kernel/apic/vector.c
>+++ b/arch/x86/kernel/apic/vector.c
>@@ -939,9 +939,14 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_irq_move_cleanup)
> * to this CPU. IRQ_MOVE_CLEANUP_VECTOR is the lowest
> * priority external vector, so on return from this
> * interrupt the device interrupt will happen first.
>+ *
>+ * *** This should never happen with the current IRQ
>+ * cleanup code, so WARN_ONCE() for now, and
>+ * eventually get rid of this hack.
> */
> irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
> if (irr & (1U << (vector % 32))) {
>+ WARN_ONCE(1, "irq_move_cleanup called on still pending
>interrupt\n");
> apic->send_IPI_self(IRQ_MOVE_CLEANUP_VECTOR);
> continue;
> }

--
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