Re: [PATCH V6 XRT Alveo 16/20] fpga: xrt: clock driver

[Tom Rix]

> +
> +static int get_freq(struct clock *clock, u16 *freq)
> +{

> +
> +	/*
> +	 * Multiply both numerator (mul0) and the denominator (div1) with
> +	 * 1000 to account for fractional portion of divider
> +	 */
> +
> +	div1 *= 1000;
> +	div1 += div_frac1;
> +	div0 *= div1;
> +	mul0 *= 1000;
> +	if (div0 == 0) {
> +		CLOCK_ERR(clock, "clockwiz 0 divider");

This prevents a divide by zero, but returns 0 without setting freq

A -EINVAL should be returned or freq initialized to some default value

> +		return 0;
> +	}
> +
> +	input = mul0 * 100;
> +	do_div(input, div0);
> +	*freq = (u16)input;
> +
> +	return 0;
> +}
> +
>
> +
> +static int clock_verify_freq(struct clock *clock)
> +{
> +	u32 lookup_freq, clock_freq_counter, request_in_khz, tolerance;
> +	int err = 0;
> +	u16 freq;
> +
> +	mutex_lock(&clock->clock_lock);
> +
> +	err = get_freq(clock, &freq);
> +	if (err) {
> +		xrt_err(clock->xdev, "get freq failed, %d", err);
> +		goto end;
> +	}
> +
> +	err = get_freq_counter(clock, &clock_freq_counter);
> +	if (err) {
> +		xrt_err(clock->xdev, "get freq counter failed, %d", err);
> +		goto end;
> +	}
> +
> +	lookup_freq = find_matching_freq(freq, frequency_table,
> +					 ARRAY_SIZE(frequency_table));

I am running v6 through clang's static analyzer, it shows a problem here

drivers/fpga/xrt/lib/xleaf/clock.c:474:16: warning: 1st function call 
argument is an uninitialized value
        lookup_freq = find_matching_freq(freq, frequency_table,
                      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

See problem with get_freq above

Tom