[PATCH 05/25] x86/MCE/AMD: Define function to find interleaving mode

From: Yazen Ghannam
Date: Fri May 07 2021 - 15:02:14 EST


From: Yazen Ghannam <yazen.ghannam@xxxxxxx>

Define a helper function to find the interleaving mode. Define a
DF2-specific function now. Future DF versions will have their own
functions.

Use an enumeration for the interleaving modes to give a human-readable
value. Save the interleaving mode in the context struct, since this will
be used in multiple functions.

Multiple interleaving modes support hashing, so save a boolean in the
context struct to check if hashing is enabled.

Signed-off-by: Yazen Ghannam <yazen.ghannam@xxxxxxx>
---
arch/x86/kernel/cpu/mce/amd.c | 38 ++++++++++++++++++++++++++++++++---
1 file changed, 35 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
index 0957f11a4c84..f1a467cb74e6 100644
--- a/arch/x86/kernel/cpu/mce/amd.c
+++ b/arch/x86/kernel/cpu/mce/amd.c
@@ -710,9 +710,17 @@ enum df_types {
DF2,
};

+/* These are mapped 1:1 to the hardware values. Special cases are set at > 0x20. */
+enum intlv_modes {
+ NONE = 0x00,
+ NOHASH_2CH = 0x01,
+ DF2_HASH_2CH = 0x21,
+};
+
/* Use "reg_" prefix for raw register values. */
struct addr_ctx {
enum df_types df_type;
+ enum intlv_modes intlv_mode;
u64 ret_addr;
u32 reg_dram_offset;
u32 reg_base_addr;
@@ -720,6 +728,7 @@ struct addr_ctx {
u16 nid;
u8 umc;
u8 map_num;
+ bool hash_enabled;
};

static enum df_types get_df_type(struct addr_ctx *ctx)
@@ -727,6 +736,28 @@ static enum df_types get_df_type(struct addr_ctx *ctx)
return DF2;
}

+static int get_intlv_mode_df2(struct addr_ctx *ctx)
+{
+ ctx->intlv_mode = (ctx->reg_base_addr >> 4) & 0xF;
+
+ if (ctx->intlv_mode == 8) {
+ ctx->intlv_mode = DF2_HASH_2CH;
+ ctx->hash_enabled = true;
+ }
+
+ if (ctx->intlv_mode != NONE &&
+ ctx->intlv_mode != NOHASH_2CH &&
+ ctx->intlv_mode != DF2_HASH_2CH)
+ return -EINVAL;
+
+ return 0;
+}
+
+static int get_intlv_mode(struct addr_ctx *ctx)
+{
+ return get_intlv_mode_df2(ctx);
+}
+
static int get_dram_offset_reg(struct addr_ctx *ctx)
{
if (amd_df_indirect_read(ctx->nid, df_regs[DRAM_OFFSET], ctx->umc, &ctx->reg_dram_offset))
@@ -792,7 +823,6 @@ int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
u8 num_intlv_bits, hashed_bit;
u8 lgcy_mmio_hole_en;
u8 cs_mask, cs_id = 0;
- bool hash_enabled = false;

struct addr_ctx ctx;

@@ -812,6 +842,9 @@ int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
if (get_dram_addr_map(&ctx))
goto out_err;

+ if (get_intlv_mode(&ctx))
+ goto out_err;
+
lgcy_mmio_hole_en = ctx.reg_base_addr & BIT(1);
intlv_num_chan = (ctx.reg_base_addr >> 4) & 0xF;
intlv_addr_sel = (ctx.reg_base_addr >> 8) & 0x7;
@@ -839,7 +872,6 @@ int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
case 7: intlv_num_chan = 4; break;

case 8: intlv_num_chan = 1;
- hash_enabled = true;
break;
default:
pr_err("%s: Invalid number of interleaved channels %d.\n",
@@ -940,7 +972,7 @@ int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
ctx.ret_addr += (BIT_ULL(32) - dram_hole_base);
}

- if (hash_enabled) {
+ if (ctx.hash_enabled) {
/* Save some parentheses and grab ls-bit at the end. */
hashed_bit = (ctx.ret_addr >> 12) ^
(ctx.ret_addr >> 18) ^
--
2.25.1