Re: [PATCH 1/1] arm: topology: parse the topology from the dt

From: Dietmar Eggemann
Date: Wed Apr 14 2021 - 09:54:20 EST


On 14/04/2021 13:26, Ruifeng Zhang wrote:
> Dietmar Eggemann <dietmar.eggemann@xxxxxxx> 于2021年4月14日周三 下午5:43写道:
>>
>> On 13/04/2021 15:26, Ruifeng Zhang wrote:
>>> Thanks for your review. Patch-v2 that solve the capacity issue will be
>>> uploaded as soon as possible. : )
>>>
>>> Valentin Schneider <valentin.schneider@xxxxxxx> 于2021年4月13日周二 下午7:40写道:
>>>>
>>>> On 13/04/21 14:13, Ruifeng Zhang wrote:
>>>>> Valentin Schneider <valentin.schneider@xxxxxxx> 于2021年4月12日周一 下午11:33写道:

[...]

>> Looks like sc9863a has two frequency domains (1.6 and 1.2GHz). So
>> technically it's a big.LITTLE system (based only on max CPU frequency
>> (not on uarch) differences).
>> But the dts file doesn't contain any `capacity-dmips-mhz` entries? So
>> asymmetric CPU capacity (even only based on max CPU frequency) detection
>> won't kick in. Since you don't have any uarch diffs, you would have to
>> specify `capacity-dmips-mhz = <1024>` for each CPU.
>
> Yes, for capacity, the DT should have a capacity-dmips-MHz entry or a
> clock-frequency entry (for A7 and A15 only).
> The sc9863a dts is a vendor file, in my opinion is not appropriate to
> be update with this series.
> What do you think if I independently update the sc9863a dts file later?
>

Yes, this is a separate thing. Just wanted to mention it here since this
allows you to test asymmetric CPU capacity on your platform w/ and w/o
your patch on arm64 and arm.

No need to add `clock-frequency` entries, just `capacity-dmips-mhz`
entries should do.