Re: [PATCH v2 6/6] i2c: mpc: Interrupt driven transfer

[Andy Shevchenko]

On Sat, Apr 10, 2021 at 11:15 PM Wolfram Sang <wsa@xxxxxxxxxx> wrote:
>
> On Mon, Mar 29, 2021 at 02:52:06PM +1300, Chris Packham wrote:
> > The fsl-i2c controller will generate an interrupt after every byte
> > transferred. Make use of this interrupt to drive a state machine which
> > allows the next part of a transfer to happen as soon as the interrupt is
> > received. This is particularly helpful with SMBUS devices like the LM81
> > which will timeout if we take too long between bytes in a transfer.
> >
> > Signed-off-by: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx>
>
> Okay, this change is too large and HW specific for a detailed review.
> But I trust you and hope you will be around to fix regressions if I
> apply it for 5.13? That kind of leads to the question if you want to
> step up as the maintainer for this driver?
>
> Only thing I noticed was a "BUG" and "BUG_ON" and wonder if we really
> need to halt the kernel in that case. Maybe WARN is enough?
>
> I'll apply the first five patches now, they look good to me.

And now is the time to revert the fifth one (at least, I don't know
the state of the rest).
It's obviously the series has not been tested (to some extent).

-- 
With Best Regards,
Andy Shevchenko