[”PATCH” 4/5] arm64: dts: marvell: add pcie mac reset to pcie

From: bpeled
Date: Mon Apr 12 2021 - 11:31:55 EST


From: Ben Peled <bpeled@xxxxxxxxxxx>

Add system controller and reset bit to each pcie to enable pcie mac reset

Signed-off-by: Ben Peled <bpeled@xxxxxxxxxxx>
---
arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 7 +++++++
1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
index 9dcf16b..eb60e73 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
@@ -11,6 +11,7 @@
#include "armada-common.dtsi"

#define CP11X_PCIEx_CONF_BASE(iface) (CP11X_PCIEx_MEM_BASE(iface) + CP11X_PCIEx_MEM_SIZE(iface))
+#define CP11X_PCIEx_MAC_RESET_BIT_MASK(n) (0x1 << 11 + ((n + 2) % 3))

/ {
/*
@@ -513,6 +514,8 @@
num-lanes = <1>;
clock-names = "core", "reg";
clocks = <&CP11X_LABEL(clk) 1 13>, <&CP11X_LABEL(clk) 1 14>;
+ marvell,system-controller = <&CP11X_LABEL(syscon0)>;
+ marvell,mac-reset-bit-mask = <CP11X_PCIEx_MAC_RESET_BIT_MASK(0)>;
status = "disabled";
};

@@ -538,6 +541,8 @@
num-lanes = <1>;
clock-names = "core", "reg";
clocks = <&CP11X_LABEL(clk) 1 11>, <&CP11X_LABEL(clk) 1 14>;
+ marvell,system-controller = <&CP11X_LABEL(syscon0)>;
+ marvell,mac-reset-bit-mask = <CP11X_PCIEx_MAC_RESET_BIT_MASK(1)>;
status = "disabled";
};

@@ -563,6 +568,8 @@
num-lanes = <1>;
clock-names = "core", "reg";
clocks = <&CP11X_LABEL(clk) 1 12>, <&CP11X_LABEL(clk) 1 14>;
+ marvell,system-controller = <&CP11X_LABEL(syscon0)>;
+ marvell,mac-reset-bit-mask = <CP11X_PCIEx_MAC_RESET_BIT_MASK(2)>;
status = "disabled";
};
};
--
2.7.4