[PATCH 0/2] Fixups to hide our goofs

From: Sean Christopherson
Date: Mon Mar 08 2021 - 21:20:19 EST


Please squash away our mistakes and hide them from the world. :-)

Stuffed the MMIO generation to start at 0x3ffffffffffffff0 (bits 61:4 set)
and role over into bit 62. Bit 63 is used for the "update in-progress" so
I'm fairly confident there are no more collisions with other SPTE bits.

For the PCID thing, note that there are two patches with the same changelog.
Not sure what's intended there...

Also, I forgot about adding the PAE root helpers until I tried testing and
PAE didn't work with SME. I'll get those to you tomorrow.

Sean Christopherson (2):
KVM: x86: Fixup "Get active PCID only when writing a CR3 value"
KVM: x86/mmu: Exclude the MMU_PRESENT bit from MMIO SPTE's generation

arch/x86/kvm/mmu/spte.h | 12 +++++++-----
arch/x86/kvm/svm/svm.c | 9 +++++++--
2 files changed, 14 insertions(+), 7 deletions(-)

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2.30.1.766.gb4fecdf3b7-goog