Re: [PATCH v3 7/9] KVM: vmx/pmu: Add Arch LBR emulation and its VMCS field

[Xu, Like]

On 2021/3/4 1:26, Sean Christopherson wrote:
> On Wed, Mar 03, 2021, Like Xu wrote:
> > New VMX controls bits for Arch LBR are added. When bit 21 in vmentry_ctrl
> > is set, VM entry will write the value from the "Guest IA32_LBR_CTL" guest
> > state field to IA32_LBR_CTL. When bit 26 in vmexit_ctrl is set, VM exit
> > will clear IA32_LBR_CTL after the value has been saved to the "Guest
> > IA32_LBR_CTL" guest state field.
> ...
>
> > @@ -2529,7 +2532,8 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf,
> >   	      VM_EXIT_LOAD_IA32_EFER |
> >   	      VM_EXIT_CLEAR_BNDCFGS |
> >   	      VM_EXIT_PT_CONCEAL_PIP |
> > -	      VM_EXIT_CLEAR_IA32_RTIT_CTL;
> > +	      VM_EXIT_CLEAR_IA32_RTIT_CTL |
> > +	      VM_EXIT_CLEAR_IA32_LBR_CTL;
> So, how does MSR_ARCH_LBR_CTL get restored on the host?  What if the host wants
> to keep _its_ LBR recording active while the guest is running?

Thank you!

I will add "host_lbrctlmsr" field to "struct vcpu_vmx" and
repeat the update/get_debugctlmsr() stuff.

> >   	if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
> >   				&_vmexit_control) < 0)
> >   		return -EIO;
> > @@ -2553,7 +2557,8 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf,
> >   	      VM_ENTRY_LOAD_IA32_EFER |
> >   	      VM_ENTRY_LOAD_BNDCFGS |
> >   	      VM_ENTRY_PT_CONCEAL_PIP |
> > -	      VM_ENTRY_LOAD_IA32_RTIT_CTL;
> > +	      VM_ENTRY_LOAD_IA32_RTIT_CTL |
> > +	      VM_ENTRY_LOAD_IA32_LBR_CTL;
> >   	if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
> >   				&_vmentry_control) < 0)
> >   		return -EIO;
> > --
> > 2.29.2