Re: [PATCH v4 net-next 00/19] net: mvpp2: Add TX Flow Control support

[Willem de Bruijn]

On Wed, Jan 27, 2021 at 6:50 AM <stefanc@xxxxxxxxxxx> wrote:
>
> From: Stefan Chulski <stefanc@xxxxxxxxxxx>
>
> Armada hardware has a pause generation mechanism in GOP (MAC).
> The GOP generate flow control frames based on an indication programmed in Ports Control 0 Register. There is a bit per port.
> However assertion of the PortX Pause bits in the ports control 0 register only sends a one time pause.
> To complement the function the GOP has a mechanism to periodically send pause control messages based on periodic counters.
> This mechanism ensures that the pause is effective as long as the Appropriate PortX Pause is asserted.
>
> Problem is that Packet Processor that actually can drop packets due to lack of resources not connected to the GOP flow control generation mechanism.
> To solve this issue Armada has firmware running on CM3 CPU dedicated for Flow Control support.
> Firmware monitors Packet Processor resources and asserts XON/XOFF by writing to Ports Control 0 Register.
>
> MSS shared SRAM memory used to communicate between CM3 firmware and PP2 driver.
> During init PP2 driver informs firmware about used BM pools, RXQs, congestion and depletion thresholds.
>
> The pause frames are generated whenever congestion or depletion in resources is detected.
> The back pressure is stopped when the resource reaches a sufficient level.
> So the congestion/depletion and sufficient level implement a hysteresis that reduces the XON/XOFF toggle frequency.
>
> Packet Processor v23 hardware introduces support for RX FIFO fill level monitor.
> Patch "add PPv23 version definition" to differ between v23 and v22 hardware.
> Patch "add TX FC firmware check" verifies that CM3 firmware supports Flow Control monitoring.
>
> v3 --> v4
> - Remove RFC tag
>
> v2 --> v3
> - Remove inline functions
> - Add PPv2.3 description into marvell-pp2.txt
> - Improve mvpp2_interrupts_mask/unmask procedure
> - Improve FC enable/disable procedure
> - Add priv->sram_pool check
> - Remove gen_pool_destroy call
> - Reduce Flow Control timer to x100 faster
>
> v1 --> v2
> - Add memory requirements information
> - Add EPROBE_DEFER if of_gen_pool_get return NULL
> - Move Flow control configuration to mvpp2_mac_link_up callback
> - Add firmware version info with Flow control support
>
> Konstantin Porotchkin (1):
>   dts: marvell: add CM3 SRAM memory to cp115 ethernet device tree
>
> Stefan Chulski (18):
>   doc: marvell: add cm3-mem device tree bindings description
>   net: mvpp2: add CM3 SRAM memory map
>   doc: marvell: add PPv2.3 description to marvell-pp2.txt
>   net: mvpp2: add PPv23 version definition
>   net: mvpp2: always compare hw-version vs MVPP21
>   net: mvpp2: increase BM pool size to 2048 buffers
>   net: mvpp2: increase RXQ size to 1024 descriptors
>   net: mvpp2: add FCA periodic timer configurations
>   net: mvpp2: add FCA RXQ non occupied descriptor threshold
>   net: mvpp2: add spinlock for FW FCA configuration path
>   net: mvpp2: enable global flow control
>   net: mvpp2: add RXQ flow control configurations
>   net: mvpp2: add ethtool flow control configuration support
>   net: mvpp2: add BM protection underrun feature support
>   net: mvpp2: add PPv23 RX FIFO flow control
>   net: mvpp2: set 802.3x GoP Flow Control mode
>   net: mvpp2: limit minimum ring size to 1024 descriptors
>   net: mvpp2: add TX FC firmware check
>
>  Documentation/devicetree/bindings/net/marvell-pp2.txt |   4 +-
>  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi         |  10 +
>  drivers/net/ethernet/marvell/mvpp2/mvpp2.h            | 130 ++++-
>  drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c       | 564 ++++++++++++++++++--
>  4 files changed, 658 insertions(+), 50 deletions(-)

Besides the per patch comments, see also the patchwork state for the
patches. Patch 3 and 12 seem to introduce new build warnings or
errors. And one patch misses the sign-off of the author in the From
line.