Re: [PATCH] platform/x86: amd-pmc: put device on error paths

[mark gross]

On Wed, Jan 20, 2021 at 08:50:05PM -0800, Pan Bian wrote:
> Put the PCI device rdev on error paths to fix potential reference count
> leaks.

Can you make a stronger statment than "fix potenital reference count leaks?".
Also, make the commit comment match the code better.

maybe something like:
"On the prob error return paths associated with rdev we are leaking ref counts, add
pci_dev_put to return patch to avoid the leaks".

Note: I'm not sure there is a leak but, assuming the code is correct the commit
comment should be more clear and match the code.

Do you have a test case that show this change is good?

--mark


> 
> Signed-off-by: Pan Bian <bianpan2016@xxxxxxx>
> ---
>  drivers/platform/x86/amd-pmc.c | 14 +++++++++++---
>  1 file changed, 11 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/platform/x86/amd-pmc.c b/drivers/platform/x86/amd-pmc.c
> index 0102bf1c7916..df140019c4bd 100644
> --- a/drivers/platform/x86/amd-pmc.c
> +++ b/drivers/platform/x86/amd-pmc.c
> @@ -210,31 +210,39 @@ static int amd_pmc_probe(struct platform_device *pdev)
>  	dev->dev = &pdev->dev;
>  
>  	rdev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
> -	if (!rdev || !pci_match_id(pmc_pci_ids, rdev))
> +	if (!rdev || !pci_match_id(pmc_pci_ids, rdev)) {
> +		pci_dev_put(rdev);
>  		return -ENODEV;
> +	}
>  
>  	dev->cpu_id = rdev->device;
>  	err = pci_write_config_dword(rdev, AMD_PMC_SMU_INDEX_ADDRESS, AMD_PMC_BASE_ADDR_LO);
>  	if (err) {
>  		dev_err(dev->dev, "error writing to 0x%x\n", AMD_PMC_SMU_INDEX_ADDRESS);
> +		pci_dev_put(rdev);
>  		return pcibios_err_to_errno(err);
>  	}
>  
>  	err = pci_read_config_dword(rdev, AMD_PMC_SMU_INDEX_DATA, &val);
> -	if (err)
> +	if (err) {
> +		pci_dev_put(rdev);
>  		return pcibios_err_to_errno(err);
> +	}
>  
>  	base_addr_lo = val & AMD_PMC_BASE_ADDR_HI_MASK;
>  
>  	err = pci_write_config_dword(rdev, AMD_PMC_SMU_INDEX_ADDRESS, AMD_PMC_BASE_ADDR_HI);
>  	if (err) {
>  		dev_err(dev->dev, "error writing to 0x%x\n", AMD_PMC_SMU_INDEX_ADDRESS);
> +		pci_dev_put(rdev);
>  		return pcibios_err_to_errno(err);
>  	}
>  
>  	err = pci_read_config_dword(rdev, AMD_PMC_SMU_INDEX_DATA, &val);
> -	if (err)
> +	if (err) {
> +		pci_dev_put(rdev);
>  		return pcibios_err_to_errno(err);
> +	}
>  
>  	base_addr_hi = val & AMD_PMC_BASE_ADDR_LO_MASK;
>  	pci_dev_put(rdev);
> -- 
> 2.17.1
> 
>