Re: [PATCH v2 4/5] arm64: dts: meson: g12a: x96-max: fix PHY deassert timing requirements

[Martin Blumenstingl]

On Tue, Dec 1, 2020 at 2:21 PM Stefan Agner <stefan@xxxxxxxx> wrote:
>
> According to the datasheet (Rev. 1.9) the RTL8211F requires at least
> 72ms "for internal circuits settling time" before accessing the PHY
> egisters. On similar boards with the same PHY this fixes an issue where
> Ethernet link would not come up when using ip link set down/up.
>
> Fixes: ed5e8f689154 ("arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line")
> Signed-off-by: Stefan Agner <stefan@xxxxxxxx>
with the "registers" typo above fixed:
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>