Re: [PATCH 3/5] perf: arm_spe: Add nested virt event decoding

From: Leo Yan
Date: Sat Sep 26 2020 - 23:11:41 EST


On Tue, Sep 22, 2020 at 11:12:23AM +0100, Andre Przywara wrote:
> The ARMv8.4 nested virtualisation extension can redirect system register
> accesses to a memory page controlled by the hypervisor. The SPE
> profiling feature in newer implementations can tag those memory accesses
> accordingly.
>
> Add the bit pattern describing this load/store type, so that the perf
> tool can decode it properly.
>
> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>
> ---
> tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> index e633bb5b8e65..943e4155b246 100644
> --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> @@ -398,6 +398,10 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf,
> buf += ret;
> blen -= ret;
> }
> + } else if ((payload & 0xfe) == 0x30) {
> + ret = snprintf(buf, buf_len, " NV-SYSREG");
> + buf += ret;
> + blen -= ret;

This change has been included in the patch "perf arm-spe: Add more sub
classes for operation packet" [1].

Thanks,
Leo

[1] https://lore.kernel.org/patchwork/patch/1288412/

> } else if (payload & 0x4) {
> ret = snprintf(buf, buf_len, " SIMD-FP");
> buf += ret;
> --
> 2.17.1
>