[PATCH 1/3] dt-bindings: soc: Add MT8192 power dt-bindings

From: Weiyi Lu
Date: Fri Sep 04 2020 - 02:45:12 EST


Add power dt-bindings of MT8192

Signed-off-by: Weiyi Lu <weiyi.lu@xxxxxxxxxxxx>
---
.../devicetree/bindings/soc/mediatek/scpsys.txt | 5 ++++
include/dt-bindings/power/mt8192-power.h | 32 ++++++++++++++++++++++
2 files changed, 37 insertions(+)
create mode 100644 include/dt-bindings/power/mt8192-power.h

diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
index efe2025..7f322f9 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
@@ -16,6 +16,7 @@ power/power-domain.yaml. It provides the power domains defined in
- include/dt-bindings/power/mt2712-power.h
- include/dt-bindings/power/mt7622-power.h
- include/dt-bindings/power/mt8183-power.h
+- include/dt-bindings/power/mt8192-power.h

Required properties for power controller:
- compatible: Should be one of:
@@ -29,6 +30,7 @@ Required properties for power controller:
- "mediatek,mt7629-scpsys", "mediatek,mt7622-scpsys": For MT7629 SoC
- "mediatek,mt8173-scpsys"
- "mediatek,mt8183-scpsys"
+ - "mediatek,mt8192-scpsys"
- #power-domain-cells: Must be 1
- #address-cells: Should be 1
- #size-cells: Should be 0
@@ -50,6 +52,9 @@ Required properties for power controller:
Required clocks for MT8183: "audio", "audio1", "audio2", "mfg", "mm",
"cam", "isp", "vpu", "vpu1", "vpu2",
"vpu3";
+ Required clocks for MT8192: "audio", "audio1", "audio2", "conn", "mfg",
+ "disp", "disp1", "ipe", "isp", "isp1",
+ "mdp", "venc", "vdec", "cam"

Optional properties for power controller:
- vdec-supply: Power supply for the vdec power domain
diff --git a/include/dt-bindings/power/mt8192-power.h b/include/dt-bindings/power/mt8192-power.h
new file mode 100644
index 0000000..4eaa53d
--- /dev/null
+++ b/include/dt-bindings/power/mt8192-power.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (c) 2020 MediaTek Inc.
+ * Author: Weiyi Lu <weiyi.lu@xxxxxxxxxxxx>
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT8192_POWER_H
+#define _DT_BINDINGS_POWER_MT8192_POWER_H
+
+#define MT8192_POWER_DOMAIN_AUDIO 0
+#define MT8192_POWER_DOMAIN_CONN 1
+#define MT8192_POWER_DOMAIN_MFG0 2
+#define MT8192_POWER_DOMAIN_MFG1 3
+#define MT8192_POWER_DOMAIN_MFG2 4
+#define MT8192_POWER_DOMAIN_MFG3 5
+#define MT8192_POWER_DOMAIN_MFG4 6
+#define MT8192_POWER_DOMAIN_MFG5 7
+#define MT8192_POWER_DOMAIN_MFG6 8
+#define MT8192_POWER_DOMAIN_DISP 9
+#define MT8192_POWER_DOMAIN_IPE 10
+#define MT8192_POWER_DOMAIN_ISP 11
+#define MT8192_POWER_DOMAIN_ISP2 12
+#define MT8192_POWER_DOMAIN_MDP 13
+#define MT8192_POWER_DOMAIN_VENC 14
+#define MT8192_POWER_DOMAIN_VDEC 15
+#define MT8192_POWER_DOMAIN_VDEC2 16
+#define MT8192_POWER_DOMAIN_CAM 17
+#define MT8192_POWER_DOMAIN_CAM_RAWA 18
+#define MT8192_POWER_DOMAIN_CAM_RAWB 19
+#define MT8192_POWER_DOMAIN_CAM_RAWC 20
+
+#endif /* _DT_BINDINGS_POWER_MT8192_POWER_H */
--
1.8.1.1.dirty