[PATCH v2 00/12] Tegra XHCI controller ELPG support

From: JC Kuo
Date: Mon Aug 31 2020 - 00:40:38 EST


Tegra XHCI controler can be placed in ELPG (Engine Level PowerGated)
state for power saving when all of the connected USB devices are in
suspended state. This patch series includes clk, phy and pmc changes
that are required for properly place controller in ELPG and bring
controller out of ELPG.

JC Kuo (12):
clk: tegra: Add PLLE HW power sequencer control
v2: no change
clk: tegra: don't enable PLLE HW sequencer at init
v2: no change
phy: tegra: xusb: t210: rearrange UPHY init
v2: no change
phy: tegra: xusb: t210: add lane_iddq operations
v2: no change
phy: tegra: xusb: add sleepwalk and suspend/resume
v2: no change
soc/tegra: pmc: provide usb sleepwalk register map
v2: make tegra_pmc_regmap_readl() and tegra_pmc_regmap_writel()
static
arm64: tegra210: XUSB PADCTL add "nvidia,pmc" prop
v2: no change
phy: tegra: xusb: t210: support wake and sleepwalk
v2: no change
phy: tegra: xusb: t186: support wake and sleepwalk
v2: no change
arm64: tegra210/tegra186/tegra194: XUSB PADCTL irq
v2: no change
usb: host: xhci-tegra: unlink power domain devices
v2: no change
xhci: tegra: enable ELPG for runtime/system PM
v2: no change

arch/arm64/boot/dts/nvidia/tegra186.dtsi | 1 +
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 1 +
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 2 +
drivers/clk/tegra/clk-pll.c | 12 -
drivers/clk/tegra/clk-tegra210.c | 51 +
drivers/phy/tegra/xusb-tegra186.c | 656 ++++++++
drivers/phy/tegra/xusb-tegra210.c | 1953 +++++++++++++++++-----
drivers/phy/tegra/xusb.c | 86 +-
drivers/phy/tegra/xusb.h | 23 +-
drivers/soc/tegra/pmc.c | 89 +
drivers/usb/host/xhci-tegra.c | 577 +++++--
include/linux/clk/tegra.h | 2 +
include/linux/phy/tegra/xusb.h | 13 +
13 files changed, 2957 insertions(+), 509 deletions(-)

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2.25.1