Re: [GIT pull] x86/urgent for v5.9-rc2

[Andy Lutomirski]

On Sun, Aug 23, 2020 at 3:35 PM Linus Torvalds
<torvalds@xxxxxxxxxxxxxxxxxxxx> wrote:
>
> On Sun, Aug 23, 2020 at 3:27 PM Andy Lutomirski <luto@xxxxxxxxxx> wrote:
> >
> > Every interrupt is going to load the CS and SS descriptor cache lines.
>
> Yeah, but this isn't even sharing the same GDT cache line. Those two
> are at least in the same cacheline, and hey, that is forced upon us by
> the architecture, so we don't have any choice.
>
> But I guess this lsl thing only triggers on the paranoid entry, so
> it's just NMI, DB and MCE.. Or?

Indeed.  And also all the new virt garbage that keeps popping up.

--Andy