Re: [PATCH V2 09/23] perf/x86/intel: Check Arch LBR MSRs

[Liang, Kan]

On 6/30/2020 10:57 AM, Peter Zijlstra wrote:
> On Fri, Jun 26, 2020 at 11:20:06AM -0700, kan.liang@xxxxxxxxxxxxxxx wrote:
> > From: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
> >
> > The KVM may not support the MSRs of Architecture LBR. Accessing the
> > MSRs may cause #GP and crash the guest.
> >
> > The MSRs have to be checked at guest boot time.
> >
> > Only using the max number of Architecture LBR depth to check the
> > MSR_ARCH_LBR_DEPTH should be good enough. The max number can be
> > calculated by 8 * the position of the last set bit of LBR_DEPTH value
> > in CPUID enumeration.
>
> But But But, this is architectural, it's in CPUID. If KVM lies to us, it
> gets to keep the pices.
>
> This was different when it was not enumerated and all we had was poking
> the MSRs, but here KVM can simply mask the CPUID bits if it doesn't
> support the MSRs.
>
> If KVM gives us the CPUID bits, we should let it crash and burn if it
> then doesn't provide the MSRs.

Agree.
If the CPUID bits are not set by KVM, the x86_pmu.lbr_nr should be 0.
The check will be ignored.

I think we just need to simply drop this patch.


Thanks,
Kan