Re: [PATCH v3 03/10] dmaengine: Introduce min burst length capability

[Andy Shevchenko]

On Wed, May 27, 2020 at 01:50:14AM +0300, Serge Semin wrote:
> Some hardware aside from default 0/1 may have greater minimum burst
> transactions length constraints. Here we introduce the DMA device
> and slave capability, which if required can be initialized by the DMA
> engine driver with the device-specific value.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>

> Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx>
> Cc: Alexey Malahov <Alexey.Malahov@xxxxxxxxxxxxxxxxxxxx>
> Cc: Thomas Bogendoerfer <tsbogend@xxxxxxxxxxxxxxxx>
> Cc: Arnd Bergmann <arnd@xxxxxxxx>
> Cc: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>
> Cc: linux-mips@xxxxxxxxxxxxxxx
> Cc: devicetree@xxxxxxxxxxxxxxx
> 
> ---
> 
> Changelog v3:
> - This is a new patch created as a result of the discussion with Vinud and
>   Andy in the framework of DW DMA burst and LLP capabilities.
> ---
>  drivers/dma/dmaengine.c   | 1 +
>  include/linux/dmaengine.h | 4 ++++
>  2 files changed, 5 insertions(+)
> 
> diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
> index d31076d9ef25..b332ffe52780 100644
> --- a/drivers/dma/dmaengine.c
> +++ b/drivers/dma/dmaengine.c
> @@ -590,6 +590,7 @@ int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
>  	caps->src_addr_widths = device->src_addr_widths;
>  	caps->dst_addr_widths = device->dst_addr_widths;
>  	caps->directions = device->directions;
> +	caps->min_burst = device->min_burst;
>  	caps->max_burst = device->max_burst;
>  	caps->residue_granularity = device->residue_granularity;
>  	caps->descriptor_reuse = device->descriptor_reuse;
> diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
> index e1c03339918f..0c7403b27133 100644
> --- a/include/linux/dmaengine.h
> +++ b/include/linux/dmaengine.h
> @@ -465,6 +465,7 @@ enum dma_residue_granularity {
>   *	Since the enum dma_transfer_direction is not defined as bit flag for
>   *	each type, the dma controller should set BIT(<TYPE>) and same
>   *	should be checked by controller as well
> + * @min_burst: min burst capability per-transfer
>   * @max_burst: max burst capability per-transfer
>   * @cmd_pause: true, if pause is supported (i.e. for reading residue or
>   *	       for resume later)
> @@ -478,6 +479,7 @@ struct dma_slave_caps {
>  	u32 src_addr_widths;
>  	u32 dst_addr_widths;
>  	u32 directions;
> +	u32 min_burst;
>  	u32 max_burst;
>  	bool cmd_pause;
>  	bool cmd_resume;
> @@ -769,6 +771,7 @@ struct dma_filter {
>   *	Since the enum dma_transfer_direction is not defined as bit flag for
>   *	each type, the dma controller should set BIT(<TYPE>) and same
>   *	should be checked by controller as well
> + * @min_burst: min burst capability per-transfer
>   * @max_burst: max burst capability per-transfer
>   * @residue_granularity: granularity of the transfer residue reported
>   *	by tx_status
> @@ -839,6 +842,7 @@ struct dma_device {
>  	u32 src_addr_widths;
>  	u32 dst_addr_widths;
>  	u32 directions;
> +	u32 min_burst;
>  	u32 max_burst;
>  	bool descriptor_reuse;
>  	enum dma_residue_granularity residue_granularity;
> -- 
> 2.26.2
> 

-- 
With Best Regards,
Andy Shevchenko