Re: [PATCH v2 3/4] clk / soc: mediatek: Bind clock and gpu driver for mt2701

From: Stephen Boyd
Date: Wed May 20 2020 - 06:14:01 EST


Quoting Enric Balletbo i Serra (2020-04-01 13:17:35)
> Now that the mmsys driver is the top-level entry point for the
> multimedia subsystem, we could bind the clock and the gpu driver on
> those devices that is expected to work, so the drm driver is
> intantiated by the mmsys driver and display, hopefully, working again.
>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@xxxxxxxxxxxxx>
> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@xxxxxxxxxx>
> ---

Acked-by: Stephen Boyd <sboyd@xxxxxxxxxx>