Re: [PATCH] iio: adc: stm32-adc: fix a wrong error message when probing interrupts

[Jonathan Cameron]

On Tue, 12 May 2020 15:27:05 +0200
Fabrice Gasnier <fabrice.gasnier@xxxxxx> wrote:

> A wrong error message is printed out currently, like on STM32MP15:
> - stm32-adc-core 48003000.adc: IRQ index 2 not found.
> 
> This is seen since commit 7723f4c5ecdb ("driver core: platform: Add an
> error message to platform_get_irq*()").
> The STM32 ADC core driver wrongly requests up to 3 interrupt lines. It
> should request only the necessary IRQs, based on the compatible:
> - stm32f4/h7 ADCs share a common interrupt
> - stm32mp1, has one interrupt line per ADC.
> So add the number of required interrupts to the compatible data.
> 
> Fixes: d58c67d1d851 ("iio: adc: stm32-adc: add support for STM32MP1")
> 
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@xxxxxx>
Applied to the fixes-togreg branch of iio.git and marked for stable.
Whilst it's only an incorrect error message it is likely to make
people think something is broken, hence the stable marking.

Thanks,

Jonathan

> ---
>  drivers/iio/adc/stm32-adc-core.c | 34 ++++++++++++++--------------------
>  1 file changed, 14 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/iio/adc/stm32-adc-core.c b/drivers/iio/adc/stm32-adc-core.c
> index ebe5dbc..3586369 100644
> --- a/drivers/iio/adc/stm32-adc-core.c
> +++ b/drivers/iio/adc/stm32-adc-core.c
> @@ -65,12 +65,14 @@ struct stm32_adc_priv;
>   * @clk_sel:	clock selection routine
>   * @max_clk_rate_hz: maximum analog clock rate (Hz, from datasheet)
>   * @has_syscfg: SYSCFG capability flags
> + * @num_irqs:	number of interrupt lines
>   */
>  struct stm32_adc_priv_cfg {
>  	const struct stm32_adc_common_regs *regs;
>  	int (*clk_sel)(struct platform_device *, struct stm32_adc_priv *);
>  	u32 max_clk_rate_hz;
>  	unsigned int has_syscfg;
> +	unsigned int num_irqs;
>  };
>  
>  /**
> @@ -375,21 +377,15 @@ static int stm32_adc_irq_probe(struct platform_device *pdev,
>  	struct device_node *np = pdev->dev.of_node;
>  	unsigned int i;
>  
> -	for (i = 0; i < STM32_ADC_MAX_ADCS; i++) {
> +	/*
> +	 * Interrupt(s) must be provided, depending on the compatible:
> +	 * - stm32f4/h7 shares a common interrupt line.
> +	 * - stm32mp1, has one line per ADC
> +	 */
> +	for (i = 0; i < priv->cfg->num_irqs; i++) {
>  		priv->irq[i] = platform_get_irq(pdev, i);
> -		if (priv->irq[i] < 0) {
> -			/*
> -			 * At least one interrupt must be provided, make others
> -			 * optional:
> -			 * - stm32f4/h7 shares a common interrupt.
> -			 * - stm32mp1, has one line per ADC (either for ADC1,
> -			 *   ADC2 or both).
> -			 */
> -			if (i && priv->irq[i] == -ENXIO)
> -				continue;
> -
> +		if (priv->irq[i] < 0)
>  			return priv->irq[i];
> -		}
>  	}
>  
>  	priv->domain = irq_domain_add_simple(np, STM32_ADC_MAX_ADCS, 0,
> @@ -400,9 +396,7 @@ static int stm32_adc_irq_probe(struct platform_device *pdev,
>  		return -ENOMEM;
>  	}
>  
> -	for (i = 0; i < STM32_ADC_MAX_ADCS; i++) {
> -		if (priv->irq[i] < 0)
> -			continue;
> +	for (i = 0; i < priv->cfg->num_irqs; i++) {
>  		irq_set_chained_handler(priv->irq[i], stm32_adc_irq_handler);
>  		irq_set_handler_data(priv->irq[i], priv);
>  	}
> @@ -420,11 +414,8 @@ static void stm32_adc_irq_remove(struct platform_device *pdev,
>  		irq_dispose_mapping(irq_find_mapping(priv->domain, hwirq));
>  	irq_domain_remove(priv->domain);
>  
> -	for (i = 0; i < STM32_ADC_MAX_ADCS; i++) {
> -		if (priv->irq[i] < 0)
> -			continue;
> +	for (i = 0; i < priv->cfg->num_irqs; i++)
>  		irq_set_chained_handler(priv->irq[i], NULL);
> -	}
>  }
>  
>  static int stm32_adc_core_switches_supply_en(struct stm32_adc_priv *priv,
> @@ -824,6 +815,7 @@ static const struct stm32_adc_priv_cfg stm32f4_adc_priv_cfg = {
>  	.regs = &stm32f4_adc_common_regs,
>  	.clk_sel = stm32f4_adc_clk_sel,
>  	.max_clk_rate_hz = 36000000,
> +	.num_irqs = 1,
>  };
>  
>  static const struct stm32_adc_priv_cfg stm32h7_adc_priv_cfg = {
> @@ -831,6 +823,7 @@ static const struct stm32_adc_priv_cfg stm32h7_adc_priv_cfg = {
>  	.clk_sel = stm32h7_adc_clk_sel,
>  	.max_clk_rate_hz = 36000000,
>  	.has_syscfg = HAS_VBOOSTER,
> +	.num_irqs = 1,
>  };
>  
>  static const struct stm32_adc_priv_cfg stm32mp1_adc_priv_cfg = {
> @@ -838,6 +831,7 @@ static const struct stm32_adc_priv_cfg stm32mp1_adc_priv_cfg = {
>  	.clk_sel = stm32h7_adc_clk_sel,
>  	.max_clk_rate_hz = 40000000,
>  	.has_syscfg = HAS_VBOOSTER | HAS_ANASWVDD,
> +	.num_irqs = 2,
>  };
>  
>  static const struct of_device_id stm32_adc_of_match[] = {