[PATCH] ASoC: brcm: DSL/PON SoC device tree bindings of audio driver

From: Kevin Li
Date: Thu Mar 12 2020 - 18:32:40 EST


Signed-off-by: Kevin Li <kevin-ke.li@xxxxxxxxxxxx>
Link: https://lore.kernel.org/r/20200312223242.2843-1-kevin-ke.li@xxxxxxxxxxxx
Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>
---
.../bindings/sound/brcm,bcm63xx-audio.txt | 29 +++++++++++++++++++
1 file changed, 29 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/brcm,bcm63xx-audio.txt

diff --git a/Documentation/devicetree/bindings/sound/brcm,bcm63xx-audio.txt b/Documentation/devicetree/bindings/sound/brcm,bcm63xx-audio.txt
new file mode 100644
index 000000000000..007f524b4d15
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/brcm,bcm63xx-audio.txt
@@ -0,0 +1,29 @@
+Broadcom DSL/PON BCM63xx Audio I2S controller
+
+Required properties:
+- compatible: Should be "brcm,bcm63xx-i2s".
+- #address-cells: 32bit valued, 1 cell.
+- #size-cells: 32bit valued, 0 cell.
+- reg: Should contain audio registers location and length
+- interrupts: Should contain the interrupt for the controller.
+- clocks: Must contain an entry for each entry in clock-names.
+ Please refer to clock-bindings.txt.
+- clock-names: One of each entry matching the clocks phandles list:
+ - "i2sclk" (generated clock) Required.
+ - "i2sosc" (fixed 200MHz clock) Required.
+
+(1) : The generated clock is required only when any of TX and RX
+ works on Master Mode.
+(2) : The fixed 200MHz clock is from internal chip and always on
+
+Example:
+
+ i2s: bcm63xx-i2s {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm63xx-i2s";
+ reg = <0xFF802080 0xFF>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&i2sclk>, <&osc>;
+ clock-names = "i2sclk","i2sosc";
+ };
--
2.20.1