Re: [PATCH] dra7: sata: Fix SATA with CONFIG_ARM_LPAE enabled

[Robin Murphy]

On 05/03/2020 12:05 pm, Roger Quadros wrote:
> Tony, Christoph,
>
> On 04/03/2020 18:20, Tony Lindgren wrote:
> > * Roger Quadros <rogerq@xxxxxx> [200304 09:01]:
> > > Even though the TRM says that SATA IP has 36 address bits
> > > wired in the SoC, we see bus errors whenever any address
> > > greater than 32-bit is given to the controller.
> > >
> > > This happens on dra7-EVM with 4G of RAM with CONFIG_ARM_LPAE=y.
> > >
> > > As a workaround we limit the DMA address range to 32-bits
> > > for SATA.
> > >
> > > Cc: Christoph Hellwig <hch@xxxxxx>
> > > Cc: Robin Murphy <robin.murphy@xxxxxxx>
> > > Cc: Rob Herring <robh+dt@xxxxxxxxxx>
> > > Reported-by: Yan Liu <yan-liu@xxxxxx>
> > > Signed-off-by: Roger Quadros <rogerq@xxxxxx>
> > > ---
> > >
> > > NOTE: Currently ARM dma-mapping code doesn't account for devices
> > > bus_dma_limit. This is fixed in [1].
> > >
> > > [1] https://lkml.org/lkml/2020/2/18/712
> >
> > So is this dts patch safe to apply without the series above?
>
> Yes. To my surprise this patch fixes the SATA issue even without [1].
> Without this patch dev->bus_dma_limit was being set to 0 and with the patch
> it is being set to 0xffffffff.

Right - LPAE configs should be getting dma-direct ops since 5.3, which 
already respect the limit. For non-LPAE configs it means you go from 
being broken from having no limit at all, to having a limit set but not 
respected, which is still equally broken, but no *more* so than before.

Robin.

> > And should this dts patch be applied as a fix or can it wait
> > until the merge window?
>
> I think we should mark it for stable and apply it right away as fix for 
> v5.6.
>
> Cc: stable@xxxxxxxxxx
>
> cheers,
> -roger
> > Regards,
> >
> > Tony
> >
> > > Â arch/arm/boot/dts/dra7.dtsi | 25 ++++++++++++++++---------
> > > Â 1 file changed, 16 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> > > index d78b684e7fca..895462c22d1c 100644
> > > --- a/arch/arm/boot/dts/dra7.dtsi
> > > +++ b/arch/arm/boot/dts/dra7.dtsi
> > > @@ -642,15 +642,22 @@
> > > ÂÂÂÂÂÂÂÂÂ };
> > > ÂÂÂÂÂÂÂÂÂ /* OCP2SCP3 */
> > > -ÂÂÂÂÂÂÂ sata: sata@4a141100 {
> > > -ÂÂÂÂÂÂÂÂÂÂÂ compatible = "snps,dwc-ahci";
> > > -ÂÂÂÂÂÂÂÂÂÂÂ reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;
> > > -ÂÂÂÂÂÂÂÂÂÂÂ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> > > -ÂÂÂÂÂÂÂÂÂÂÂ phys = <&sata_phy>;
> > > -ÂÂÂÂÂÂÂÂÂÂÂ phy-names = "sata-phy";
> > > -ÂÂÂÂÂÂÂÂÂÂÂ clocks = <&l3init_clkctrl DRA7_L3INIT_SATA_CLKCTRL 8>;
> > > -ÂÂÂÂÂÂÂÂÂÂÂ ti,hwmods = "sata";
> > > -ÂÂÂÂÂÂÂÂÂÂÂ ports-implemented = <0x1>;
> > > +ÂÂÂÂÂÂÂ sata_aux_bus {
> > > +ÂÂÂÂÂÂÂÂÂÂÂ #address-cells = <1>;
> > > +ÂÂÂÂÂÂÂÂÂÂÂ #size-cells = <2>;
> > > +ÂÂÂÂÂÂÂÂÂÂÂ compatible = "simple-bus";
> > > +ÂÂÂÂÂÂÂÂÂÂÂ ranges = <0x0 0x4a140000 0x0 0x1200>;
> > > +ÂÂÂÂÂÂÂÂÂÂÂ dma-ranges = <0x0 0x0 0x1 0x00000000>;
> > > +ÂÂÂÂÂÂÂÂÂÂÂ sata: sata@4a141100 {
> > > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ compatible = "snps,dwc-ahci";
> > > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ reg = <0x0 0x0 0x1100>, <0x1100 0x0 0x7>;
> > > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> > > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ phys = <&sata_phy>;
> > > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ phy-names = "sata-phy";
> > > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ clocks = <&l3init_clkctrl DRA7_L3INIT_SATA_CLKCTRL 8>;
> > > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ ti,hwmods = "sata";
> > > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ ports-implemented = <0x1>;
> > > +ÂÂÂÂÂÂÂÂÂÂÂ };
> > > ÂÂÂÂÂÂÂÂÂ };
> > > ÂÂÂÂÂÂÂÂÂ /* OCP2SCP1 */
> > > --
> > > Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> > > Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki