Re: [PATCH] media: adv7604: Add new predefined video timings for adv76xx

[Hans Verkuil]

On 05/03/2020 09:59, Beniamin Bia wrote:
> This patch adds more predefined video timings for adv76xx family.
> 
> Signed-off-by: Beniamin Bia <beniamin.bia@xxxxxxxxxx>
> Signed-off-by: Dragos Bogdan <dragos.bogdan@xxxxxxxxxx>
> ---
>  drivers/media/i2c/adv7604.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
> index 2dedd6ebb236..bf16c7a626a9 100644
> --- a/drivers/media/i2c/adv7604.c
> +++ b/drivers/media/i2c/adv7604.c
> @@ -280,6 +280,8 @@ static const struct adv76xx_video_standards adv7604_prim_mode_gr[] = {
>  static const struct adv76xx_video_standards adv76xx_prim_mode_hdmi_comp[] = {
>  	{ V4L2_DV_BT_CEA_720X480P59_94, 0x0a, 0x00 },
>  	{ V4L2_DV_BT_CEA_720X576P50, 0x0b, 0x00 },
> +	{ V4L2_DV_BT_CEA_1280X720P25, 0x13, 0x03 },
> +	{ V4L2_DV_BT_CEA_1280X720P24, 0x13, 0x04 },

Are these two tested? V4L2_DV_BT_CEA_1280X720P25 in particular has an
extremely high horizontal frontporch (2420) that not all receivers can
handle.

Looking at this line:

             bt->hfrontporch = (hdmi_read(sd, 0x20) & 0x03) * 256 +
                        hdmi_read(sd, 0x21);

I'd say that the adv7604 can't handle any timings with a hfrontporch > 1023.

Regards,

	Hans

>  	{ V4L2_DV_BT_CEA_1280X720P50, 0x13, 0x01 },
>  	{ V4L2_DV_BT_CEA_1280X720P60, 0x13, 0x00 },
>  	{ V4L2_DV_BT_CEA_1920X1080P24, 0x1e, 0x04 },
> @@ -305,8 +307,17 @@ static const struct adv76xx_video_standards adv76xx_prim_mode_hdmi_gr[] = {
>  	{ V4L2_DV_BT_DMT_1024X768P70, 0x0d, 0x00 },
>  	{ V4L2_DV_BT_DMT_1024X768P75, 0x0e, 0x00 },
>  	{ V4L2_DV_BT_DMT_1024X768P85, 0x0f, 0x00 },
> +	{ V4L2_DV_BT_DMT_1280X768P60, 0x10, 0x00 },
> +	{ V4L2_DV_BT_DMT_1280X768P60_RB, 0x11, 0x00 },
>  	{ V4L2_DV_BT_DMT_1280X1024P60, 0x05, 0x00 },
>  	{ V4L2_DV_BT_DMT_1280X1024P75, 0x06, 0x00 },
> +	{ V4L2_DV_BT_DMT_1360X768P60, 0x12, 0x00 },
> +	{ V4L2_DV_BT_DMT_1366X768P60, 0x13, 0x00 },
> +	{ V4L2_DV_BT_DMT_1400X1050P60, 0x14, 0x00 },
> +	{ V4L2_DV_BT_DMT_1400X1050P75, 0x15, 0x00 },
> +	{ V4L2_DV_BT_DMT_1600X1200P60, 0x16, 0x00 },
> +	{ V4L2_DV_BT_DMT_1680X1050P60, 0x18, 0x00 },
> +	{ V4L2_DV_BT_DMT_1920X1200P60_RB, 0x19, 0x00 },
>  	{ },
>  };
>  
>