Re: [PATCH 3/3] bus: ti-sysc: Implement display subsystem reset quirk

From: Tony Lindgren
Date: Tue Mar 03 2020 - 10:49:59 EST


* Tony Lindgren <tony@xxxxxxxxxxx> [200303 15:14]:
> * Tomi Valkeinen <tomi.valkeinen@xxxxxx> [200303 06:03]:
> > On 24/02/2020 21:12, Tony Lindgren wrote:
> > > + if (sysc_soc->soc == SOC_3430) {
> > > + /* Clear DSS_SDI_CONTROL */
> > > + sysc_write(ddata, dispc_offset + 0x44, 0);
> > > +
> > > + /* Clear DSS_PLL_CONTROL */
> > > + sysc_write(ddata, dispc_offset + 0x48, 0);
> >
> > These are not dispc registers, but dss registers.
>
> Ouch. Thanks for catching this, will include in the fix.
>
> > > + }
> > > +
> > > + /* Clear DSS_CONTROL to switch DSS clock sources to PRCM if not */
> > > + sysc_write(ddata, dispc_offset + 0x40, 0);
> >
> > Same here.

Below is a fix using dispc offset for dss registers.

Regards,

Tony

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