// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2018 PHYTEC Messtechnik GmbH * Author: Christian Hemp */ #include / { pcie_gpio_leds: leds { compatible = "gpio-leds"; status = "disabled"; /* pcie-wlan-reset { gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; default-state = "on"; }; */ pcie-1 { gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>; default-state = "on"; }; pcie-2 { gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>; default-state = "on"; }; }; usb_gpio_leds: leds { compatible = "gpio-leds"; status = "disabled"; usb-hub-en { gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>; default-state = "on"; }; adsb-en { gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; default-state = "on"; }; }; reg_en_switch: regulator-en-switch { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_en_switch>; regulator-name = "Enable Switch"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; gpio = <&gpio3 4 GPIO_ACTIVE_HIGH>; regulator-always-on; }; reg_pcie: regulator-pcie { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie_reg>; regulator-name = "mPCIe_1V5"; regulator-min-microvolt = <1500000>; regulator-max-microvolt = <1500000>; gpio = <&gpio3 0 GPIO_ACTIVE_HIGH>; enable-active-high; }; reg_usb_h1_vbus: usb-h1-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbh1_vbus>; regulator-name = "usb_h1_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio2 18 GPIO_ACTIVE_HIGH>; enable-active-high; }; reg_usbotg_vbus: usbotg-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg_vbus>; regulator-name = "usb_otg_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high; }; }; &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; clock-frequency = <100000>; status = "disabled"; i2c_pex8605: pex8605@58 { compatible = "plx,pex8605"; reg = <0x58>; status = "disabled"; }; }; &i2c2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; clock-frequency = <100000>; status = "disabled"; }; &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; // reset-gpio = <&gpio2 25 GPIO_ACTIVE_LOW>; vpcie-supply = <®_pcie>; status = "disabled"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "disabled"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "okay"; }; &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; status = "disabled"; }; &uart4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart4>; status = "disabled"; }; &usbh1 { vbus-supply = <®_usb_h1_vbus>; disable-over-current; status = "disabled"; }; &usbotg { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg>; vbus-supply = <®_usbotg_vbus>; disable-over-current; status = "disabled"; }; &usdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio6 31 GPIO_ACTIVE_LOW>; no-1-8-v; status = "disabled"; }; &iomuxc { pinctrl_cam0data: cam0datagrp { fsl,pins = < MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x0001b0b0 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x0001b0b0 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x0001b0b0 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x0001b0b0 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x0001b0b0 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x0001b0b0 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x0001b0b0 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x0001b0b0 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x0001b0b0 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x4001b0b0 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x0001b0b0 >; }; pinctrl_cam0clk: cam0clkgrp { fsl,pins = ; }; pinctrl_cam0switch: cam0switchgrp { fsl,pins = < MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x4001b0b0 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x4001b0b0 >; }; pinctrl_panel_en: panelen1grp { fsl,pins = < MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0xb0b1 >; }; pinctrl_en_switch: enswitchgrp { fsl,pins = < MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0xb0b1 >; }; pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 >; }; pinctrl_flexcan1_en: flexcan1engrp { fsl,pins = < MX6QDL_PAD_EIM_A18__GPIO2_IO20 0xb0b1 >; }; pinctrl_hdmicec: hdmicecgrp { fsl,pins = < MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 >; }; pinctrl_i2c1: i2c1grp { fsl,pins = < MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 >; }; pinctrl_pcie: pciegrp { fsl,pins = < MX6QDL_PAD_EIM_OE__GPIO2_IO25 0xb0b1 >; }; pinctrl_pcie_reg: pciereggrp { fsl,pins = < MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0xb0b1 >; }; pinctrl_pwm1: pwm1grp { fsl,pins = < MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 >; }; pinctrl_rtc_int: rtcintgrp { fsl,pins = < MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b0 >; }; pinctrl_stmpe: stmpegrp { fsl,pins = < MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 >; }; pinctrl_uart3: uart3grp { fsl,pins = < MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 >; }; pinctrl_uart4: uart4grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 >; }; pinctrl_usbh1_vbus: usbh1vbusgrp { fsl,pins = < MX6QDL_PAD_EIM_A20__GPIO2_IO18 0xb0b1 >; }; pinctrl_usbotg: usbotggrp { fsl,pins = < MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 >; }; pinctrl_usbotg_vbus: usbotgvbusgrp { fsl,pins = < MX6QDL_PAD_EIM_A19__GPIO2_IO19 0xb0b1 >; }; pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0xb0b1 /* CD */ >; }; };