Re: [PATCH 1/1] pwm: mediatek: add longer period support

[Uwe Kleine-König]

Hello Sam,

On Thu, Feb 27, 2020 at 08:27:07PM +0800, Sam Shih wrote:
> > > 
> > > + /* The pwm source clock can be divided by 2^clkdiv. When the clksel  +
> > > * bit is set to 1, The final clock output needs to be divided by an +  *
> > > extra 1625.
> > > +  */
> > 
> > I'd write:
> > 
> > The source clock is divided by 2^clkdiv or iff the clksel bit is set by
> > 2^clkdiv + 1625.
> > 
> 
> Great, the comment is short and clear. 
> But maybe change â2^clkdiv + 1625â to âthe product of 2^clkdiv and 1625â
> is clearer ?

Writing a formula in words isn't helpful. If my formula was wrong use
the right one. I wrote

	2^clkdiv + 1625

(which implicitly means (2^clkdiv) + 1625), if this is wrong write

	2^clkdiv * 1625

or whatever is the right one then. And use parenthesis if you doubt
clearness.

Best regards
Uwe

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Pengutronix e.K.                           | Uwe Kleine-KÃnig            |
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