Re: [PATCH RESEND] drm/mcde: Fix Sphinx formatting

From: Daniel Vetter
Date: Fri Feb 14 2020 - 13:25:18 EST


On Fri, Feb 14, 2020 at 05:38:15PM +0100, Jonathan Neuschäfer wrote:
> - Format the pipe diagram as a monospace block.
> - Fix formatting of the list. Without the empty line, the first dash is
> not parsed as a bullet point.
>
> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@xxxxxxx>
> ---
> Previous copy: https://lore.kernel.org/lkml/20191002153827.23026-2-j.neuschaefer@xxxxxxx/
>
> It seems that this patch got lost, somehow.

Occasionally happens with the committer model we have, especially for
smaller drivers. Thanks for resending, applied to drm-misc-next now.
-Daniel

> ---
> drivers/gpu/drm/mcde/mcde_drv.c | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/mcde/mcde_drv.c b/drivers/gpu/drm/mcde/mcde_drv.c
> index 9a09eba53182..c535abed4765 100644
> --- a/drivers/gpu/drm/mcde/mcde_drv.c
> +++ b/drivers/gpu/drm/mcde/mcde_drv.c
> @@ -20,11 +20,11 @@
> * input formats including most variants of RGB and YUV.
> *
> * The hardware has four display pipes, and the layout is a little
> - * bit like this:
> + * bit like this::
> *
> - * Memory -> Overlay -> Channel -> FIFO -> 5 formatters -> DSI/DPI
> - * External 0..5 0..3 A,B, 3 x DSI bridge
> - * source 0..9 C0,C1 2 x DPI
> + * Memory -> Overlay -> Channel -> FIFO -> 5 formatters -> DSI/DPI
> + * External 0..5 0..3 A,B, 3 x DSI bridge
> + * source 0..9 C0,C1 2 x DPI
> *
> * FIFOs A and B are for LCD and HDMI while FIFO CO/C1 are for
> * panels with embedded buffer.
> @@ -43,6 +43,7 @@
> * to change as we exploit more of the hardware capabilities.
> *
> * TODO:
> + *
> * - Enabled damaged rectangles using drm_plane_enable_fb_damage_clips()
> * so we can selectively just transmit the damaged area to a
> * command-only display.
> --
> 2.20.1
>

--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch