Re: [v3] x86/tsc: Unset TSC_KNOWN_FREQ and TSC_RELIABLE flags on Intel Bay Trail SoC

[Andy Shevchenko]

On Tue, Jan 21, 2020 at 08:11:57PM +0530, Vipul Kumar wrote:
> From: Vipul Kumar <vipul_kumar@xxxxxxxxxx>
> 
> commit f3a02ecebed7 ("x86/tsc: Set TSC_KNOWN_FREQ and TSC_RELIABLE
> flags on Intel Atom SoCs"), is setting TSC_KNOWN_FREQ and TSC_RELIABLE
> flags for Soc's which is causing time drift on Valleyview/Bay trail Soc.
> 
> This patch introduces a new macro to skip these flags.

I guess commit message still needs to provide the measurements
for the both with and without the option being selected.

-- 
With Best Regards,
Andy Shevchenko