Re: [PATCH v3] PCI: dwc: Add support to add GEN3 related equalization quirks

[Christoph Hellwig]

On Tue, Oct 15, 2019 at 08:29:22AM +0530, Pankaj Dubey wrote:
> From: Anvesh Salveru <anvesh.s@xxxxxxxxxxx>
> 
> In some platforms, PCIe PHY may have issues which will prevent linkup
> to happen in GEN3 or higher speed. In case equalization fails, link will
> fallback to GEN1.
> 
> DesignWare controller gives flexibility to disable GEN3 equalization
> completely or only phase 2 and 3 of equalization.
> 
> This patch enables the DesignWare driver to disable the PCIe GEN3
> equalization by enabling one of the following quirks:
>  - DWC_EQUALIZATION_DISABLE: To disable GEN3 equalization all phases
>  - DWC_EQ_PHASE_2_3_DISABLE: To disable GEN3 equalization phase 2 & 3
> 
> Platform drivers can set these quirks via "quirk" variable of "dw_pcie"
> struct.

Please submit this together with the changes to the dwc frontend driver
that actually wants to set these quirks.