Re: IOMMU vs Ryzen embedded EMMC controller

[Suthikulpanit, Suravee]

Hi,

On 10/9/19 2:25 PM, Jiri Kosina wrote:
> On Fri, 27 Sep 2019, Shah, Nehal-bakulchandra wrote:
> 
>>>>> Do you have BAR memory allocation failures in dmesg with IOMMU on?
>>>
>>> No. The device is *not* treated as PCI device and I still think that
>>> this is the source of the evil.
>>>
>>>>> Actually, sharing both working and non-working dmesg, as well as
>>>>> /proc/iomem contents, would be helpful.
> 
>>>> Yes, can you please grab dmesg from a boot with iommu enabled and add
>>>> 'amd_iommu_dump' to the kernel command line? That should give some
>>>> hints on what is going on.
>>>
>>> For now I attach a dmesg and iomem from the boot with IOMMU enabled.
>>> Nothing much interesting without IOMMU, sdhci-acpi there just works --
>>> let me know if you still want me to send the kernel msg.
>>>
>>> Thanks for looking into this!
>>>
>>
>> I have added Suravee from AMD in the mail loop. He works on IOMMU part.
>> As per my understanding, it needs a patch in IOMMU driver for adding
>> support of EMMC. Note that on Ryzen platform we have EMMC 5.0 as ACPI
>> device.
> 
> Friendly ping ... any news here?
> 
> Thanks,
> 

Could you please boot the system w/ kernel option amd_iommu_dump=1,
and do "dmesg | grep AMD-Vi". Then provide the output.

I suspect that there is something missing in the IVRS table, where it needs
to provide ACPI HID for the eMMC device.

See kernel parameter:

ivrs_acpihid    [HW,X86_64]
                         Provide an override to the ACPI-HID:UID<->DEVICE-ID
                         mapping provided in the IVRS ACPI table. For
                         example, to map UART-HID:UID AMD0020:0 to
                         PCI device 00:14.5 write the parameter as:
                                 ivrs_acpihid[00:14.5]=AMD0020:0

Here we might need to do.

     ivrs_acpihid[00:13.1]=<emmc ACPI HID on that system>

Thanks,
Suravee