Re: [PATCH -next] arm64/mm: fix a bogus GFP flag in pgd_alloc()

[Qian Cai]

On Wed, 2019-06-12 at 09:57 +0300, Mike Rapoport wrote:
> Hi,
> 
> On Tue, Jun 11, 2019 at 08:46:45AM -0400, Qian Cai wrote:
> > 
> > > On Jun 11, 2019, at 8:41 AM, Mike Rapoport <rppt@xxxxxxxxxxxxx> wrote:
> > > 
> > > Sorry for the delay, I'm mostly offline these days.
> > > 
> > > I wanted to understand first what is the reason for the failure. I've
> > > tried
> > > to reproduce it with qemu, but I failed to find a bootable configuration
> > > that will have PGD_SIZE != PAGE_SIZE :(
> > > 
> > > Qian Cai, can you share what is your environment and the kernel config?
> > 
> > https://raw.githubusercontent.com/cailca/linux-mm/master/arm64.config
> > 
> > # lscpu
> > Architecture:ÂÂÂÂÂÂÂÂaarch64
> > Byte Order:ÂÂÂÂÂÂÂÂÂÂLittle Endian
> > CPU(s):ÂÂÂÂÂÂÂÂÂÂÂÂÂÂ256
> > On-line CPU(s) list: 0-255
> > Thread(s) per core:ÂÂ4
> > Core(s) per socket:ÂÂ32
> > Socket(s):ÂÂÂÂÂÂÂÂÂÂÂ2
> > NUMA node(s):ÂÂÂÂÂÂÂÂ2
> > Vendor ID:ÂÂÂÂÂÂÂÂÂÂÂCavium
> > Model:ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ1
> > Model name:ÂÂÂÂÂÂÂÂÂÂThunderX2 99xx
> > Stepping:ÂÂÂÂÂÂÂÂÂÂÂÂ0x1
> > BogoMIPS:ÂÂÂÂÂÂÂÂÂÂÂÂ400.00
> > L1d cache:ÂÂÂÂÂÂÂÂÂÂÂ32K
> > L1i cache:ÂÂÂÂÂÂÂÂÂÂÂ32K
> > L2 cache:ÂÂÂÂÂÂÂÂÂÂÂÂ256K
> > L3 cache:ÂÂÂÂÂÂÂÂÂÂÂÂ32768K
> > NUMA node0 CPU(s):ÂÂÂ0-127
> > NUMA node1 CPU(s):ÂÂÂ128-255
> > Flags:ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂfp asimd evtstrm aes pmull sha1 sha2 crc32 atomics
> > cpuid asimdrdm
> > 
> > # dmidecode
> > Handle 0x0001, DMI type 1, 27 bytes
> > System Information
> > ÂÂÂÂÂÂÂÂManufacturer: HPE
> > ÂÂÂÂÂÂÂÂProduct Name: Apollo 70ÂÂÂÂÂÂÂÂÂÂÂÂÂ
> > ÂÂÂÂÂÂÂÂVersion: X1
> > ÂÂÂÂÂÂÂÂWake-up Type: Power Switch
> > ÂÂÂÂÂÂÂÂFamily: CN99XX
> > 
> 
> Can you please also send the entire log when the failure happens?

https://cailca.github.io/files/dmesg.txt

> Another question, is the problem exist with PGD_SIZE == PAGE_SIZE?

No.