Re: [PATCH v3 1/4] KVM: LAPIC: Make lapic timer unpinned when timer is injected by pi

[Marcelo Tosatti]

On Wed, Jun 12, 2019 at 08:45:10AM +0800, Wanpeng Li wrote:
> On Wed, 12 Jun 2019 at 04:39, Marcelo Tosatti <mtosatti@xxxxxxxxxx> wrote:
> >
> > On Tue, Jun 11, 2019 at 08:17:06PM +0800, Wanpeng Li wrote:
> > > From: Wanpeng Li <wanpengli@xxxxxxxxxxx>
> > >
> > > Make lapic timer unpinned when timer is injected by posted-interrupt,
> > > the emulated timer can be offload to the housekeeping cpus.
> > >
> > > The host admin should fine tuned, e.g. dedicated instances scenario
> > > w/ nohz_full cover the pCPUs which vCPUs resident, several pCPUs
> > > surplus for housekeeping, disable mwait/hlt/pause vmexits to occupy
> > > the pCPUs, fortunately preemption timer is disabled after mwait is
> > > exposed to guest which makes emulated timer offload can be possible.
> >
> > Li,
> >
> > Nice!
> >
> > I think you can drop the HRTIMER_MODE_ABS_PINNED and
> > instead have
> >
> > void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
> > {
> >         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
> >         kvm_vcpu_kick(vcpu);
> > }
> >
> > As an alternative to commit 61abdbe0bcc2b32745ab4479cc550f4c1f518ee2
> > (as a first patch in your series).
> >
> > This will make the logic simpler (and timer migration, for
> > nonhousekeeping case, ensures timer is migrated).
> 
> Good point. :)

Actually should probably revisit the KVM_REQ_PENDING_TIMER logic,
and only use the LAPIC injection to avoid guest entry,
and use LAPIC's vcpu_kick as well.

> > Also, should make this work for non housekeeping case as well.
> > (But that can be done later).
> 
> The timer fire may cause other vCPUs vmexits for non housekeeping
> case(after migrating timers fail during vCPU is scheduled to run in a
> different pCPU). 

There should be no timer migration fail in the non housekeeping case?

> Could you explain more?

Would have to find an optimal placement of interrupt handlers and vcpus.

Say, if a socket has 4 pcpus, and 3 vcpus, the free pcpu could house
the interrupt handlers.

But can start with housekeeping structure, then later find a solution
for nonhousekeeping.