Re: [PATCH 7/7] clocksource/arm_arch_timer: Use arch_timer_read_counter to access stable counters

From: Daniel Lezcano
Date: Fri May 03 2019 - 16:33:01 EST



Hi Valentin,

On 30/04/2019 17:39, Valentin Schneider wrote:
> Hi,
>
> On 30/04/2019 16:27, Marc Zyngier wrote:
> [...]
>>>> @@ -372,6 +392,7 @@ static u32 notrace sun50i_a64_read_cntv_tval_el0(void)
>>>> DEFINE_PER_CPU(const struct arch_timer_erratum_workaround *, timer_unstable_counter_workaround);
>>>> EXPORT_SYMBOL_GPL(timer_unstable_counter_workaround);
>>>>
>>>> +static atomic_t timer_unstable_counter_workaround_in_use = ATOMIC_INIT(0);
>>>
>>> Wouldn't make sense to READ_ONCE / WRITE_ONCE instead of using an atomic?
>>
>> I don't think *_ONCE says anything about the atomicity of the access. It
>> only instruct the compiler that this should only be accessed once, and
>> not reloaded/rewritten.
>
> FWIW 7bd3e239d6c6 ("locking: Remove atomicy checks from {READ,WRITE}_ONCE")
> points this out.

Interesting, thanks for the pointer.

-- Daniel


--
<http://www.linaro.org/> Linaro.org â Open source software for ARM SoCs

Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog