Re: Re: Re: Re: [RFC][PATCH 2/5] mips/atomic: Fix loongson_llsc_mb() wreckage

[huangpei]

> -----ååéä-----
> åää: "Peter Zijlstra" <peterz@xxxxxxxxxxxxx>
> åéæé: 2019-04-25 20:26:11 (ææå)
> æää: huangpei@xxxxxxxxxxx
> æé: "Paul Burton" <paul.burton@xxxxxxxx>, "stern@xxxxxxxxxxxxxxxxxxx" <stern@xxxxxxxxxxxxxxxxxxx>, "akiyks@xxxxxxxxx" <akiyks@xxxxxxxxx>, "andrea.parri@xxxxxxxxxxxxxxxxxxxx" <andrea.parri@xxxxxxxxxxxxxxxxxxxx>, "boqun.feng@xxxxxxxxx" <boqun.feng@xxxxxxxxx>, "dlustig@xxxxxxxxxx" <dlustig@xxxxxxxxxx>, "dhowells@xxxxxxxxxx" <dhowells@xxxxxxxxxx>, "j.alglave@xxxxxxxxx" <j.alglave@xxxxxxxxx>, "luc.maranget@xxxxxxxx" <luc.maranget@xxxxxxxx>, "npiggin@xxxxxxxxx" <npiggin@xxxxxxxxx>, "paulmck@xxxxxxxxxxxxx" <paulmck@xxxxxxxxxxxxx>, "will.deacon@xxxxxxx" <will.deacon@xxxxxxx>, "linux-kernel@xxxxxxxxxxxxxxx" <linux-kernel@xxxxxxxxxxxxxxx>, "torvalds@xxxxxxxxxxxxxxxxxxxx" <torvalds@xxxxxxxxxxxxxxxxxxxx>, "Huacai Chen" <chenhc@xxxxxxxxxx>
> äé: Re: Re: Re: [RFC][PATCH 2/5] mips/atomic: Fix loongson_llsc_mb() wreckage
> 
> On Thu, Apr 25, 2019 at 07:32:59PM +0800, huangpei@xxxxxxxxxxx wrote:
> 
> > > > If it is not LL/SC but other memory access from B on V, A's ll/sc can
> > > > follow the atomic semantics even if A violate the coherence protocol
> > > > in the same situation.
> > > 
> > > *shudder*...
> > > 
> > >   C atomic-set
> > > 
> > >   {
> > > 	  atomic_set(v, 1);
> > >   }
> 
> This is the initial state.
> 
> > 
> > > 
> > >   P1(atomic_t *v)
> > >   {
> > > 	  atomic_add_unless(v, 1, 0);
> > >   }
> > > 
> > >   P2(atomic_t *v)
> > >   {
> > > 	  atomic_set(v, 0);
> > >   }
> > > 
> > >   exists
> > >   (v=2)
> > > 
> > > So that one will still work? (that is, v=2 is forbidden)
> > 
> > you mean CïP1, P2 on 3 different CPU? I do not know much about LKMM, can explain the test case more explicit?
> 
> The 'C' is the language identifier, the 'atomic-set' is the litmus name.
> 
> The unnamed block give the initial conditions.
> 
> Pn blocks give code sequences for CPU n
> 
> The 'exists' clause is evaluated after all Pn blocks are done.
> 
> There's others in this thread that can point you to many papers and
> resources on these litmus test thingies.
> 
> So basically the initial value of @v is set to 1.
> 
> Then CPU-1 does atomic_add_unless(v, 1, 0)
>      CPU-2 does atomic_set(v, 0)
> 
> If CPU1 goes first, it will see 1, which is not 0 and thus add 1 to 1
> and obtains 2. Then CPU2 goes and writes 0, so the exist clause sees
> v==0 and doesn't observe 2.
> 
> The other way around, CPU-2 goes first, writes a 0, then CPU-1 goes and
> observes the 0, finds it matches 0 and doesn't add.  Again, the exist
> clause will find 0 doesn't match 2.
> 
> This all goes unstuck if interleaved like:
> 
> 
> 	CPU-1			CPU-2
> 
> 				xor	t0, t0
> 1:	ll	t0, v
> 	bez	t0, 2f
> 				sw	t0, v
> 	add	t0, t1
> 	sc	t0, v
> 	beqz t0, 1b
> 
> (sorry if I got the MIPS asm wrong; it's not something I normally write)
> 
> And the store-word from CPU-2 doesn't make the SC from CPU-1 fail.
> 

loongson's llsc bug DOES NOT fail this litmus( we will not get V=2)ï

only speculative memory access from CPU-1 can "blind" CPU-1(here blind means do ll/sc
 wrongï, this speculative memory access can be observed corrently by CPU2. In this 
case, sw from CPU-2 can get I , which can be observed by CPU-1, and clear llbitïthen 
failed sc. 



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