Re: [PATCH V4 1/3] dt-bindings: mmc: tegra: Add pinctrl for SDMMC drive strengths

From: Rob Herring
Date: Tue Jan 15 2019 - 15:05:09 EST


On Thu, 10 Jan 2019 14:46:01 -0800, Sowjanya Komatineni wrote:
> Add pinctrls for 3V3 and 1V8 pad drive strength configuration for
> Tegra210 sdmmc.
>
> Tegra210 sdmmc has pad configuration registers in pinmux register
> domain and handled thru pinctrl to pinmux device node.
>
> Tegra186 and Tegra194 has pad configuration register with in the
> SDMMC register domain itself and are handles thru drive strength
> properties in sdmmc device node.
>
> Signed-off-by: Sowjanya Komatineni <skomatineni@xxxxxxxxxx>
> ---
> Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>

Reviewed-by: Rob Herring <robh@xxxxxxxxxx>