Re: [PATCH v2] clk: qcom: smd: Add support for MSM8998 rpm clocks

From: Jeffrey Hugo
Date: Fri Dec 07 2018 - 11:08:49 EST

On 12/7/2018 8:10 AM, Jeffrey Hugo wrote:
On 12/7/2018 3:30 AM, Marc Gonzalez wrote:
On 06/12/2018 23:11, Jeffrey Hugo wrote:

Add rpm smd clocks, PMIC and bus clocks which are required on MSM8998
for clients to vote on.

Signed-off-by: Jeffrey Hugo <jhugo@xxxxxxxxxxxxxx>
---
v2
-fix compatible ordering nits per Stephen

 .../devicetree/bindings/clock/qcom,rpmcc.txt | 1 +
 drivers/clk/qcom/clk-smd-rpm.c | 62 ++++++++++++++++++++++
 include/dt-bindings/clock/qcom,rpmcc.h | 6 +++
 3 files changed, 69 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
index 87b4949..944719b 100644
--- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
+++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
@@ -16,6 +16,7 @@ Required properties :
ÂÂÂÂÂÂÂÂÂÂÂÂÂ "qcom,rpmcc-msm8974", "qcom,rpmcc"
ÂÂÂÂÂÂÂÂÂÂÂÂÂ "qcom,rpmcc-apq8064", "qcom,rpmcc"
ÂÂÂÂÂÂÂÂÂÂÂÂÂ "qcom,rpmcc-msm8996", "qcom,rpmcc"
+ÂÂÂÂÂÂÂÂÂÂÂ "qcom,rpmcc-msm8998", "qcom,rpmcc"
ÂÂÂÂÂÂÂÂÂÂÂÂÂ "qcom,rpmcc-qcs404", "qcom,rpmcc"
 - #clock-cells : shall contain 1
diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
index d3aadae..b1f95a9 100644
--- a/drivers/clk/qcom/clk-smd-rpm.c
+++ b/drivers/clk/qcom/clk-smd-rpm.c
@@ -655,10 +655,72 @@ static int clk_smd_rpm_enable_scaling(struct qcom_smd_rpm *rpm)
ÂÂÂÂÂ .num_clks = ARRAY_SIZE(qcs404_clks),
 };
+/* msm8998 */
+DEFINE_CLK_SMD_RPM(msm8998, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);
+DEFINE_CLK_SMD_RPM(msm8998, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);
+DEFINE_CLK_SMD_RPM(msm8998, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, div_clk1, div_clk1_a, 0xb);
+DEFINE_CLK_SMD_RPM(msm8998, ipa_clk, ipa_a_clk, QCOM_SMD_RPM_IPA_CLK, 0);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, bb_clk1, bb_clk1_a, 1);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, bb_clk2, bb_clk2_a, 2);
+DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, bb_clk3_pin, bb_clk3_a_pin, 3);
+DEFINE_CLK_SMD_RPM(msm8998, mmssnoc_axi_rpm_clk, mmssnoc_axi_rpm_a_clk,
+ÂÂÂÂÂÂÂÂÂÂ QCOM_SMD_RPM_MMAXI_CLK, 0);
+DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc_clk, aggre1_noc_a_clk,
+ÂÂÂÂÂÂÂÂÂÂ QCOM_SMD_RPM_AGGR_CLK, 1);
+DEFINE_CLK_SMD_RPM(msm8998, aggre2_noc_clk, aggre2_noc_a_clk,
+ÂÂÂÂÂÂÂÂÂÂ QCOM_SMD_RPM_AGGR_CLK, 2);
+DEFINE_CLK_SMD_RPM_QDSS(msm8998, qdss_clk, qdss_a_clk,
+ÂÂÂÂÂÂÂÂÂÂÂ QCOM_SMD_RPM_MISC_CLK, 1);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, rf_clk1, rf_clk1_a, 4);
+DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk2_pin, rf_clk2_a_pin, 5);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, rf_clk3, rf_clk3_a, 6);
+DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3_pin, rf_clk3_a_pin, 6);
+static struct clk_smd_rpm *msm8998_clks[] = {
+ÂÂÂ [RPM_SMD_SNOC_CLK] = &msm8998_snoc_clk,
+ÂÂÂ [RPM_SMD_SNOC_A_CLK] = &msm8998_snoc_a_clk,
+ÂÂÂ [RPM_SMD_CNOC_CLK] = &msm8998_cnoc_clk,
+ÂÂÂ [RPM_SMD_CNOC_A_CLK] = &msm8998_cnoc_a_clk,
+ÂÂÂ [RPM_SMD_CE1_CLK] = &msm8998_ce1_clk,
+ÂÂÂ [RPM_SMD_CE1_A_CLK] = &msm8998_ce1_a_clk,
+ÂÂÂ [RPM_SMD_DIV_CLK1] = &msm8998_div_clk1,
+ÂÂÂ [RPM_SMD_DIV_A_CLK1] = &msm8998_div_clk1_a,
+ÂÂÂ [RPM_SMD_IPA_CLK] = &msm8998_ipa_clk,
+ÂÂÂ [RPM_SMD_IPA_A_CLK] = &msm8998_ipa_a_clk,
+ÂÂÂ [RPM_SMD_BB_CLK1] = &msm8998_bb_clk1,
+ÂÂÂ [RPM_SMD_BB_CLK1_A] = &msm8998_bb_clk1_a,
+ÂÂÂ [RPM_SMD_BB_CLK2] = &msm8998_bb_clk2,
+ÂÂÂ [RPM_SMD_BB_CLK2_A] = &msm8998_bb_clk2_a,
+ÂÂÂ [RPM_SMD_BB_CLK3_PIN] = &msm8998_bb_clk3_pin,
+ÂÂÂ [RPM_SMD_BB_CLK3_A_PIN] = &msm8998_bb_clk3_a_pin,
+ÂÂÂ [RPM_SMD_MMAXI_CLK] = &msm8998_mmssnoc_axi_rpm_clk,
+ÂÂÂ [RPM_SMD_MMAXI_A_CLK] = &msm8998_mmssnoc_axi_rpm_a_clk,
+ÂÂÂ [RPM_SMD_AGGR1_NOC_CLK] = &msm8998_aggre1_noc_clk,
+ÂÂÂ [RPM_SMD_AGGR1_NOC_A_CLK] = &msm8998_aggre1_noc_a_clk,
+ÂÂÂ [RPM_SMD_AGGR2_NOC_CLK] = &msm8998_aggre2_noc_clk,
+ÂÂÂ [RPM_SMD_AGGR2_NOC_A_CLK] = &msm8998_aggre2_noc_a_clk,
+ÂÂÂ [RPM_SMD_QDSS_CLK] = &msm8998_qdss_clk,
+ÂÂÂ [RPM_SMD_QDSS_A_CLK] = &msm8998_qdss_a_clk,
+ÂÂÂ [RPM_SMD_RF_CLK1] = &msm8998_rf_clk1,
+ÂÂÂ [RPM_SMD_RF_CLK1_A] = &msm8998_rf_clk1_a,
+ÂÂÂ [RPM_SMD_RF_CLK2_PIN] = &msm8998_rf_clk2_pin,
+ÂÂÂ [RPM_SMD_RF_CLK2_A_PIN] = &msm8998_rf_clk2_a_pin,
+ÂÂÂ [RPM_SMD_RF_CLK3] = &msm8998_rf_clk3,
+ÂÂÂ [RPM_SMD_RF_CLK3_A] = &msm8998_rf_clk3_a,
+ÂÂÂ [RPM_SMD_RF_CLK3_PIN] = &msm8998_rf_clk3_pin,
+ÂÂÂ [RPM_SMD_RF_CLK3_A_PIN] = &msm8998_rf_clk3_a_pin,
+};
+
+static const struct rpm_smd_clk_desc rpm_clk_msm8998 = {
+ÂÂÂ .clks = msm8998_clks,
+ÂÂÂ .num_clks = ARRAY_SIZE(msm8998_clks),
+};
+
 static const struct of_device_id rpm_smd_clk_match_table[] = {
ÂÂÂÂÂ { .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 },
ÂÂÂÂÂ { .compatible = "qcom,rpmcc-msm8974", .data = &rpm_clk_msm8974 },
ÂÂÂÂÂ { .compatible = "qcom,rpmcc-msm8996", .data = &rpm_clk_msm8996 },
+ÂÂÂ { .compatible = "qcom,rpmcc-msm8998", .data = &rpm_clk_msm8998 },
 { .compatible = "qcom,rpmcc-qcs404", .data = &rpm_clk_qcs404 },
ÂÂÂÂÂ { }
 };
diff --git a/include/dt-bindings/clock/qcom,rpmcc.h b/include/dt-bindings/clock/qcom,rpmcc.h
index 3658b0c..81dbd1f 100644
--- a/include/dt-bindings/clock/qcom,rpmcc.h
+++ b/include/dt-bindings/clock/qcom,rpmcc.h
@@ -127,5 +127,11 @@
 #define RPM_SMD_BIMC_GPU_A_CLK 77
 #define RPM_SMD_QPIC_CLK 78
 #define RPM_SMD_QPIC_CLK_A 79
+#define RPM_SMD_BB_CLK3_PINÂÂÂÂÂÂÂÂÂÂÂ 80
+#define RPM_SMD_BB_CLK3_A_PINÂÂÂÂÂÂÂÂÂÂÂ 81
+#define RPM_SMD_RF_CLK3ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ 82
+#define RPM_SMD_RF_CLK3_AÂÂÂÂÂÂÂÂÂÂÂ 83
+#define RPM_SMD_RF_CLK3_PINÂÂÂÂÂÂÂÂÂÂÂ 84
+#define RPM_SMD_RF_CLK3_A_PINÂÂÂÂÂÂÂÂÂÂÂ 85
 #endif


What's the difference between RPM_SMD_LN_BB_CLK and RPM_SMD_BB_CLK1?

$ git grep RPM_SMD_LN_BB_CLK
arch/arm64/boot/dts/qcom/msm8996.dtsi:ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
arch/arm64/boot/dts/qcom/msm8996.dtsi: <&rpmcc RPM_SMD_LN_BB_CLK>,
drivers/clk/qcom/clk-smd-rpm.c: [RPM_SMD_LN_BB_CLK] = &msm8996_ln_bb_clk,
drivers/clk/qcom/clk-smd-rpm.c: [RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
include/dt-bindings/clock/qcom,rpmcc.h:#define RPM_SMD_LN_BB_CLKÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ 74


$ git grep 'RPM_SMD_BB_CLK1\>'
Documentation/devicetree/bindings/sound/qcom,wcd9335.txt: <&rpmcc RPM_SMD_BB_CLK1>;
drivers/clk/qcom/clk-smd-rpm.c: [RPM_SMD_BB_CLK1]ÂÂÂÂÂÂÂÂÂÂÂÂÂÂ = &msm8916_bb_clk1,
drivers/clk/qcom/clk-smd-rpm.c: [RPM_SMD_BB_CLK1] = &msm8996_bb_clk1,
drivers/clk/qcom/clk-smd-rpm.c: [RPM_SMD_BB_CLK1] = &msm8998_bb_clk1,
include/dt-bindings/clock/qcom,rpmcc.h:#define RPM_SMD_BB_CLK1ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ 10


Because the downstream kernel defines:

DEFINE_CLK_RPM_SMD_XO_BUFFER(ln_bb_clk1, ln_bb_clk1_ao, LN_BB_CLK1_ID);
DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(ln_bb_clk1_pin, ln_bb_clk1_pin_ao,
ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ LN_BB_CLK1_PIN_ID);
DEFINE_CLK_RPM_SMD_XO_BUFFER(ln_bb_clk2, ln_bb_clk2_ao, LN_BB_CLK2_ID);
DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(ln_bb_clk2_pin, ln_bb_clk2_pin_ao,
ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ LN_BB_CLK2_PIN_ID);
DEFINE_CLK_RPM_SMD_XO_BUFFER(ln_bb_clk3, ln_bb_clk3_ao, LN_BB_CLK3_ID);
DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(ln_bb_clk3_pin, ln_bb_clk3_pin_ao,
ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ LN_BB_CLK3_PIN_ID);

ÂÂÂÂCLK_LIST(ln_bb_clk1),
ÂÂÂÂCLK_LIST(ln_bb_clk1_ao),
ÂÂÂÂCLK_LIST(ln_bb_clk1_pin),
ÂÂÂÂCLK_LIST(ln_bb_clk1_pin_ao),
ÂÂÂÂCLK_LIST(ln_bb_clk2),
ÂÂÂÂCLK_LIST(ln_bb_clk2_ao),
ÂÂÂÂCLK_LIST(ln_bb_clk2_pin),
ÂÂÂÂCLK_LIST(ln_bb_clk2_pin_ao),
ÂÂÂÂCLK_LIST(ln_bb_clk3),
ÂÂÂÂCLK_LIST(ln_bb_clk3_ao),
ÂÂÂÂCLK_LIST(ln_bb_clk3_pin),
ÂÂÂÂCLK_LIST(ln_bb_clk3_pin_ao),


While your patch defines

DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, bb_clk1, bb_clk1_a, 1);
DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, bb_clk2, bb_clk2_a, 2);
DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, bb_clk3_pin, bb_clk3_a_pin, 3);

ÂÂÂÂ[RPM_SMD_BB_CLK1] = &msm8998_bb_clk1,
ÂÂÂÂ[RPM_SMD_BB_CLK1_A] = &msm8998_bb_clk1_a,
ÂÂÂÂ[RPM_SMD_BB_CLK2] = &msm8998_bb_clk2,
ÂÂÂÂ[RPM_SMD_BB_CLK2_A] = &msm8998_bb_clk2_a,
ÂÂÂÂ[RPM_SMD_BB_CLK3_PIN] = &msm8998_bb_clk3_pin,
ÂÂÂÂ[RPM_SMD_BB_CLK3_A_PIN] = &msm8998_bb_clk3_a_pin,


Good question. I don't know.

The downstream ln_bb IDs correspond to the bb IDs used by upstream 8996, where as the upstream 8996 ln_bb IDs are different. The IDs seem to be the important thing, where as the "name" seems to be fairly irrelevant to the actual handling of the clock.

I haven't yet found documentation other than the downstream code about these clocks, so I chose to be consistent with 8996.

I found some schematics, and they have "ln_bb", so I'll respin with that nomenclature after I have a look at your crash.


Also, as a side note, I limited the list of clocks I enumerated to those which the downstream driver defined, and were used when grepping the downstream DT.



--
Jeffrey Hugo
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.