[tip:x86/cpu] x86/apic: Add Hygon Dhyana support

From: tip-bot for Pu Wen
Date: Thu Sep 27 2018 - 13:05:52 EST


Commit-ID: da33dfef404174b0b452f4d2a9a9e00801794f3a
Gitweb: https://git.kernel.org/tip/da33dfef404174b0b452f4d2a9a9e00801794f3a
Author: Pu Wen <puwen@xxxxxxxx>
AuthorDate: Sun, 23 Sep 2018 17:35:28 +0800
Committer: Borislav Petkov <bp@xxxxxxx>
CommitDate: Thu, 27 Sep 2018 18:28:58 +0200

x86/apic: Add Hygon Dhyana support

Add Hygon Dhyana support to the APIC subsystem. When running in 32 bit
mode, bigsmp should be enabled if there are more than 8 cores online.

Signed-off-by: Pu Wen <puwen@xxxxxxxx>
Signed-off-by: Borislav Petkov <bp@xxxxxxx>
Reviewed-by: Borislav Petkov <bp@xxxxxxx>
Cc: tglx@xxxxxxxxxxxxx
Cc: mingo@xxxxxxxxxx
Cc: hpa@xxxxxxxxx
Cc: x86@xxxxxxxxxx
Cc: thomas.lendacky@xxxxxxx
Link: https://lkml.kernel.org/r/7a557265a8c7c9e842fe60f9d8e064458801aef3.1537533369.git.puwen@xxxxxxxx
---
arch/x86/kernel/apic/apic.c | 7 +++++++
arch/x86/kernel/apic/probe_32.c | 1 +
2 files changed, 8 insertions(+)

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 84132eddb5a8..ab731ab09f06 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -224,6 +224,11 @@ static int modern_apic(void)
if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
boot_cpu_data.x86 >= 0xf)
return 1;
+
+ /* Hygon systems use modern APIC */
+ if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
+ return 1;
+
return lapic_get_version() >= 0x14;
}

@@ -1912,6 +1917,8 @@ static int __init detect_init_APIC(void)
(boot_cpu_data.x86 >= 15))
break;
goto no_apic;
+ case X86_VENDOR_HYGON:
+ break;
case X86_VENDOR_INTEL:
if (boot_cpu_data.x86 == 6 || boot_cpu_data.x86 == 15 ||
(boot_cpu_data.x86 == 5 && boot_cpu_has(X86_FEATURE_APIC)))
diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c
index 02e8acb134f8..47ff2976c292 100644
--- a/arch/x86/kernel/apic/probe_32.c
+++ b/arch/x86/kernel/apic/probe_32.c
@@ -185,6 +185,7 @@ void __init default_setup_apic_routing(void)
break;
}
/* If P4 and above fall through */
+ case X86_VENDOR_HYGON:
case X86_VENDOR_AMD:
def_to_bigsmp = 1;
}