[PATCH 3.16 194/410] x86/xen: init %gs very early to avoid page faults with stack protector

From: Ben Hutchings
Date: Thu Jun 07 2018 - 10:41:35 EST


3.16.57-rc1 review patch. If anyone has any objections, please let me know.

------------------

From: Juergen Gross <jgross@xxxxxxxx>

commit 4f277295e54c5b7340e48efea3fc5cc21a2872b7 upstream.

When running as Xen pv guest %gs is initialized some time after
C code is started. Depending on stack protector usage this might be
too late, resulting in page faults.

So setup %gs and MSR_GS_BASE in assembly code already.

Signed-off-by: Juergen Gross <jgross@xxxxxxxx>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>
Tested-by: Chris Patterson <cjp256@xxxxxxxxx>
Signed-off-by: Juergen Gross <jgross@xxxxxxxx>
[bwh: Backported to 3.16: adjust context]
Signed-off-by: Ben Hutchings <ben@xxxxxxxxxxxxxxx>
---
--- a/arch/x86/xen/xen-head.S
+++ b/arch/x86/xen/xen-head.S
@@ -8,7 +8,9 @@

#include <asm/boot.h>
#include <asm/asm.h>
+#include <asm/msr.h>
#include <asm/page_types.h>
+#include <asm/percpu.h>

#include <xen/interface/elfnote.h>
#include <xen/interface/features.h>
@@ -42,7 +44,20 @@ ENTRY(startup_xen)
#else
mov %rsi,xen_start_info
mov $init_thread_union+THREAD_SIZE,%rsp
+
+ /* Set up %gs.
+ *
+ * The base of %gs always points to the bottom of the irqstack
+ * union. If the stack protector canary is enabled, it is
+ * located at %gs:40. Note that, on SMP, the boot cpu uses
+ * init data section till per cpu areas are set up.
+ */
+ movl $MSR_GS_BASE,%ecx
+ movq $INIT_PER_CPU_VAR(irq_stack_union),%rax
+ cdq
+ wrmsr
#endif
+
jmp xen_start_kernel

__FINIT