Re: [PATCH v2 12/13] ARM: dts: ipq8074: Add pcie nodes

[Sricharan R]

Hi Abhishek,

On 3/16/2018 4:50 PM, Abhishek Sahu wrote:
> On 2018-03-16 15:08, Sricharan R wrote:
>> The driver/phy support for ipq8074 is available now.
>> So enabling the nodes in DT.
>>
>> Signed-off-by: Sricharan R <sricharan@xxxxxxxxxxxxxx>
>> ---
>> Âarch/arm64/boot/dts/qcom/ipq8074.dtsi | 157 +++++++++++++++++++++++++++++++++-
>> Â1 file changed, 156 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>> b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>> index 806fc56..7562650 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>> @@ -24,7 +24,7 @@
>> ÂÂÂÂÂÂÂÂ ranges = <0 0 0 0xffffffff>;
>> ÂÂÂÂÂÂÂÂ compatible = "simple-bus";
>>
>> -ÂÂÂÂÂÂÂ pinctrl@1000000 {
>> +ÂÂÂÂÂÂÂ tlmm: pinctrl@1000000 {
>> ÂÂÂÂÂÂÂÂÂÂÂÂ compatible = "qcom,ipq8074-pinctrl";
>> ÂÂÂÂÂÂÂÂÂÂÂÂ reg = <0x1000000 0x300000>;
>> ÂÂÂÂÂÂÂÂÂÂÂÂ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
>> @@ -229,6 +229,161 @@
>> ÂÂÂÂÂÂÂÂÂÂÂÂ dma-names = "tx", "rx", "cmd";
>> ÂÂÂÂÂÂÂÂÂÂÂÂ status = "disabled";
>> ÂÂÂÂÂÂÂÂ };
>> +
>> +ÂÂÂÂÂÂÂ pcie_phy0: phy@86000 {
>> +ÂÂÂÂÂÂÂÂÂÂÂ compatible = "qcom,ipq8074-qmp-pcie-phy";
>> +ÂÂÂÂÂÂÂÂÂÂÂ reg = <0x86000 0x1000>;
>> +ÂÂÂÂÂÂÂÂÂÂÂ #phy-cells = <0>;
>> +ÂÂÂÂÂÂÂÂÂÂÂ clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
>> +ÂÂÂÂÂÂÂÂÂÂÂ clock-names = "pipe_clk";
>> +ÂÂÂÂÂÂÂÂÂÂÂ clock-output-names = "pcie20_phy0_pipe_clk";
>> +
>> +ÂÂÂÂÂÂÂÂÂÂÂ resets = <&gcc GCC_PCIE0_PHY_BCR>,
>> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ <&gcc GCC_PCIE0PHY_PHY_BCR>;
>> +ÂÂÂÂÂÂÂÂÂÂÂ reset-names = "phy",
>> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ "common";
>> +ÂÂÂÂÂÂÂÂÂÂÂ status = "disabled";
>> +ÂÂÂÂÂÂÂ };
>> +
>> +ÂÂÂÂÂÂÂ pcie0: pci@20000000 {
>> +ÂÂÂÂÂÂÂÂÂÂÂ compatible = "qcom,pcie-ipq8074";
>> +ÂÂÂÂÂÂÂÂÂÂÂ reg =Â <0x20000000 0xf1d
>> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ 0x20000F20 0xa8
> 
> Âs/0x20000F20/0x20000f20

ok

> 
>> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ 0x80000 0x2000
>> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ 0x20100000 0x1000>;
>> +ÂÂÂÂÂÂÂÂÂÂÂ reg-names = "dbi", "elbi", "parf", "config";
>> +ÂÂÂÂÂÂÂÂÂÂÂ device_type = "pci";
>> +ÂÂÂÂÂÂÂÂÂÂÂ linux,pci-domain = <0>;
>> +ÂÂÂÂÂÂÂÂÂÂÂ bus-range = <0x00 0xff>;
>> +ÂÂÂÂÂÂÂÂÂÂÂ num-lanes = <1>;
>> +ÂÂÂÂÂÂÂÂÂÂÂ #address-cells = <3>;
>> +ÂÂÂÂÂÂÂÂÂÂÂ #size-cells = <2>;
>> +
>> +ÂÂÂÂÂÂÂÂÂÂÂ phys = <&pcie_phy0>;
>> +ÂÂÂÂÂÂÂÂÂÂÂ phy-names = "pciephy";
>> +
>> +ÂÂÂÂÂÂÂÂÂÂÂ ranges = <0x81000000 0 0x20200000 0x20200000
>> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ 0 0x00100000ÂÂ /* downstream I/O */
> 
> Âwe can remove trailing zeros from address.
> Âs/0x00100000/0x100000
> 
>> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ 0x82000000 0 0x20300000 0x20300000
>> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ 0 0x00d00000>; /* non-prefetchable memory */
> 
> Âs/0x00d00000/0xd00000
> 
> ÂSame changes are for PCIE1 also.

 ok

> 
> ÂWith that.
> 
> ÂReviewed-by: Abhishek Sahu <absahu@xxxxxxxxxxxxxx>

 Thanks.

Regards,
 Sricharan

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