Re: [PATCH v2 1/2] clk: aspeed: Fix is_enabled for certain clocks

From: Stephen Boyd
Date: Thu Mar 15 2018 - 14:14:33 EST


Quoting Eddie James (2018-03-08 12:57:19)
> Some of the Aspeed clocks are disabled by setting the relevant bit in
> the "clock stop control" register to one, while others are disabled by
> setting their bit to zero. The driver already uses a flag per gate to
> identify this behavior, but doesn't apply it in the clock is_enabled
> function.
>
> Use the existing gate flag to correctly return whether or not a clock
> is enabled in the aspeed_clk_is_enabled function.
>
> Signed-off-by: Eddie James <eajames@xxxxxxxxxxxxxxxxxx>
> ---

Applied to clk-fixes