[PATCH] staging: pi433: fix CamelCase for dccPercent variables

From: Valentin Vidic
Date: Wed Dec 13 2017 - 15:02:01 EST


Fixes checkpatch warning:

CHECK: Avoid CamelCase: <dccPercent>

Signed-off-by: Valentin Vidic <Valentin.Vidic@xxxxxxxxx>
---
drivers/staging/pi433/rf69.c | 30 +++++++++++++++---------------
drivers/staging/pi433/rf69.h | 6 +++---
drivers/staging/pi433/rf69_enum.h | 18 +++++++++---------
3 files changed, 27 insertions(+), 27 deletions(-)

diff --git a/drivers/staging/pi433/rf69.c b/drivers/staging/pi433/rf69.c
index f77ecd60f43a..23787f32bc73 100644
--- a/drivers/staging/pi433/rf69.c
+++ b/drivers/staging/pi433/rf69.c
@@ -352,31 +352,31 @@ enum lnaGain rf69_get_lna_gain(struct spi_device *spi)
}
}

-int rf69_set_dc_cut_off_frequency_intern(struct spi_device *spi, u8 reg, enum dccPercent dccPercent)
-{
- switch (dccPercent) {
- case dcc16Percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_16_PERCENT);
- case dcc8Percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_8_PERCENT);
- case dcc4Percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_4_PERCENT);
- case dcc2Percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_2_PERCENT);
- case dcc1Percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_1_PERCENT);
- case dcc0_5Percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_0_5_PERCENT);
- case dcc0_25Percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_0_25_PERCENT);
- case dcc0_125Percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_0_125_PERCENT);
+int rf69_set_dc_cut_off_frequency_intern(struct spi_device *spi, u8 reg, enum dcc_percent dcc_percent)
+{
+ switch (dcc_percent) {
+ case dcc_16_percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_16_PERCENT);
+ case dcc_8_percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_8_PERCENT);
+ case dcc_4_percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_4_PERCENT);
+ case dcc_2_percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_2_PERCENT);
+ case dcc_1_percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_1_PERCENT);
+ case dcc_0_5_percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_0_5_PERCENT);
+ case dcc_0_25_percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_0_25_PERCENT);
+ case dcc_0_125_percent: return rf69_read_mod_write(spi, reg, MASK_BW_DCC_FREQ, BW_DCC_0_125_PERCENT);
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
}
}

-int rf69_set_dc_cut_off_frequency(struct spi_device *spi, enum dccPercent dccPercent)
+int rf69_set_dc_cut_off_frequency(struct spi_device *spi, enum dcc_percent dcc_percent)
{
- return rf69_set_dc_cut_off_frequency_intern(spi, REG_RXBW, dccPercent);
+ return rf69_set_dc_cut_off_frequency_intern(spi, REG_RXBW, dcc_percent);
}

-int rf69_set_dc_cut_off_frequency_during_afc(struct spi_device *spi, enum dccPercent dccPercent)
+int rf69_set_dc_cut_off_frequency_during_afc(struct spi_device *spi, enum dcc_percent dcc_percent)
{
- return rf69_set_dc_cut_off_frequency_intern(spi, REG_AFCBW, dccPercent);
+ return rf69_set_dc_cut_off_frequency_intern(spi, REG_AFCBW, dcc_percent);
}

static int rf69_set_bandwidth_intern(struct spi_device *spi, u8 reg,
diff --git a/drivers/staging/pi433/rf69.h b/drivers/staging/pi433/rf69.h
index e8803241b13b..dfc1a863d78c 100644
--- a/drivers/staging/pi433/rf69.h
+++ b/drivers/staging/pi433/rf69.h
@@ -40,9 +40,9 @@ int rf69_set_pa_ramp(struct spi_device *spi, enum paRamp paRamp);
int rf69_set_antenna_impedance(struct spi_device *spi, enum antennaImpedance antennaImpedance);
int rf69_set_lna_gain(struct spi_device *spi, enum lnaGain lnaGain);
enum lnaGain rf69_get_lna_gain(struct spi_device *spi);
-int rf69_set_dc_cut_off_frequency_intern(struct spi_device *spi, u8 reg, enum dccPercent dccPercent);
-int rf69_set_dc_cut_off_frequency(struct spi_device *spi, enum dccPercent dccPercent);
-int rf69_set_dc_cut_off_frequency_during_afc(struct spi_device *spi, enum dccPercent dccPercent);
+int rf69_set_dc_cut_off_frequency_intern(struct spi_device *spi, u8 reg, enum dcc_percent dcc_percent);
+int rf69_set_dc_cut_off_frequency(struct spi_device *spi, enum dcc_percent dcc_percent);
+int rf69_set_dc_cut_off_frequency_during_afc(struct spi_device *spi, enum dcc_percent dcc_percent);
int rf69_set_bandwidth(struct spi_device *spi, enum mantisse mantisse, u8 exponent);
int rf69_set_bandwidth_during_afc(struct spi_device *spi, enum mantisse mantisse, u8 exponent);
int rf69_set_ook_threshold_type(struct spi_device *spi, enum thresholdType thresholdType);
diff --git a/drivers/staging/pi433/rf69_enum.h b/drivers/staging/pi433/rf69_enum.h
index ec91f329d871..dd33126817b6 100644
--- a/drivers/staging/pi433/rf69_enum.h
+++ b/drivers/staging/pi433/rf69_enum.h
@@ -76,15 +76,15 @@ enum lnaGain {
undefined
};

-enum dccPercent {
- dcc16Percent,
- dcc8Percent,
- dcc4Percent,
- dcc2Percent,
- dcc1Percent,
- dcc0_5Percent,
- dcc0_25Percent,
- dcc0_125Percent
+enum dcc_percent {
+ dcc_16_percent,
+ dcc_8_percent,
+ dcc_4_percent,
+ dcc_2_percent,
+ dcc_1_percent,
+ dcc_0_5_percent,
+ dcc_0_25_percent,
+ dcc_0_125_percent
};

enum mantisse {
--
2.15.0