Re: [PATCH v2 4/7] ghes_edac: avoid multiple calls to dmi_walk()

From: Kani, Toshimitsu
Date: Thu Aug 17 2017 - 17:08:49 EST


On Wed, 2017-08-16 at 11:51 -0600, Toshi Kani wrote:
> On Wed, 2017-08-16 at 19:40 +0200, Borislav Petkov wrote:
> > On Wed, Aug 16, 2017 at 05:28:50PM +0000, Kani, Toshimitsu wrote:
:
> > > I will test the patch with an SCI when I got a chance.ÂÂI won't
> > > be able to test other notification types or race conditions,
> > > though.
> >
> > Thanks, here's the latest version with the atomic registration too.
>
> Sure, I will test with this version.

I briefly tested the patch with an SCI. The error reporting part seems
to work fine.

There are two issues I noticed:

1. It creates mc0 and mc1. Â
I think this is because you called edac_mc_alloc() with mc_num 1.

2. 'ras-mc-ctl --layout' does not show all DIMMs.

#Âras-mc-ctl --layout
+------------------------+
ÂÂÂÂÂÂÂÂÂ|ÂÂÂÂmc0ÂÂÂÂÂ|ÂÂÂÂmc1ÂÂÂÂÂ|
---------+------------------------+
memory4: |ÂÂÂÂÂ0 MBÂÂ|ÂÂ16384 MBÂÂ|
memory3: |ÂÂÂÂÂ0 MBÂÂ|ÂÂÂÂÂ0 MBÂÂ|
memory2: |ÂÂÂÂÂ0 MBÂÂ|ÂÂÂÂÂ0 MBÂÂ|
memory1: |ÂÂÂÂÂ0 MBÂÂ|ÂÂÂÂÂ0 MBÂÂ|
memory0: |ÂÂÂÂÂ0 MBÂÂ|ÂÂ8192 MBÂÂ|
---------+-----------------------+

# ls /sys/bus/mc1/devices
csrow0ÂÂÂcsrow12ÂÂcsrow23ÂÂdimm0ÂÂÂdimm12ÂÂdimm23ÂÂmc1
csrow11ÂÂcsrow19ÂÂcsrow4ÂÂÂdimm11ÂÂdimm19ÂÂdimm4

Thanks,
-Toshi