[PATCH v3 0/6] powerpc/perf: Export memory hierarchy level

From: Madhavan Srinivasan
Date: Mon Apr 10 2017 - 21:51:40 EST


Power8/Power9 Perforence Monitoring Unit (PMU) supports
different sampling modes (SM) such as Random Instruction
Sampling (RIS), Random Load/Store Facility Sampling (RLS)
and Random Branch Sampling (RBS). Sample mode RLS updates
Sampled Instruction Event Register [SIER] bits with memory
hierarchy information for a cache reload. Patchset exports
the hierarchy information to the user via the perf_mem_data_src
object from SIER.

Patchset is a rebase of the work posted previously with minor
updates to it.

https://lkml.org/lkml/2015/6/11/92

Changelog v3:
-Removed is_load_store() and merged the same to get_memdata_src callback
-Added a check to update OP_LOAD or OP_STORE in data_src->val

Changelog v2:
-Updated the commit messages
-Fixed isa207_find_source() to consider all the possible sier[ldst] values.

Changelog v1:
- Fixed author-ship for the first patch and added suka's "Signed-off-by:".

Madhavan Srinivasan (5):
powerpc/perf: Export memory hierarchy info to user space
powerpc/perf: Support to export MMCRA[TEC*] field to userspace
powerpc/perf: Support to export SIERs bit in Power8
powerpc/perf: Support to export SIERs bit in Power9
powerpc/perf: Add Power8 mem_access event to sysfs

Sukadev Bhattiprolu (1):
powerpc/perf: Define big-endian version of perf_mem_data_src

arch/powerpc/include/asm/perf_event_server.h | 3 +
arch/powerpc/perf/core-book3s.c | 8 +++
arch/powerpc/perf/isa207-common.c | 82 ++++++++++++++++++++++++++++
arch/powerpc/perf/isa207-common.h | 26 ++++++++-
arch/powerpc/perf/power8-events-list.h | 6 ++
arch/powerpc/perf/power8-pmu.c | 4 ++
arch/powerpc/perf/power9-pmu.c | 2 +
include/uapi/linux/perf_event.h | 16 ++++++
tools/include/uapi/linux/perf_event.h | 16 ++++++
9 files changed, 162 insertions(+), 1 deletion(-)

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