Re: [RESEND PATCH v2 0/5] Fix the parse_dt of exynos dsi and remove the OF graph

[Hoegeun Kwon]

On 02/28/2017 06:58 PM, Krzysztof Kozlowski wrote:
> On Tue, Feb 28, 2017 at 10:17 AM, Hoegeun Kwon <hoegeun.kwon@xxxxxxxxxxx> wrote:
> > Hi All,
> >
> > [Resend this v2 patches, because i have missing TO and CC.]
> >
> > The dsi + panel is a parental relationship, so OF grpah is not needed.
> > Therefore, the current dsi_parse_dt function will throw an error,
> > because there is no linked OF graph for case such as fimd + dsi +
> > panel.
> >
> > So the 1/5 patch parse the Pll, burst and esc clock frequency
> > properties in dsi_parse_dt and modified to create a bridge_node only
> > if there is an OF graph associated with dsi.
> >
> > Also fixed the dts, which depend on the 1/5 patch. So removed the
> > ports node and move burst and esc clock frequency properties to the
> > parent (DSI node).
> Discussions in previous thread lead us to bisectability problem.
> Bisectability in regular driver changes is one thing but in case of
> driver + DTS the gap is much bigger. DTS will go through separate tree
> and branches. How do you want to solve the problem?

Sorry for the delay in reply, Mar 1st was the holiday.
I thought of two solutions.

1. squash the patches in a single patch

2. split the dts related patches so that the first part adds the:
+    samsung,burst-clock-frequency = <512000000>;
+    samsung,esc-clock-frequency = <16000000>;

and the second part at the end removes the 'port' node
So it consists of 6 patches in total.

Which do you think is better?
If you have any other ideas, could you tell me?

Best Regards,
Hoegeun

> Best regards,
> Krzysztof