[PATCH v1 06/10] platform/x86: intel_mid_powerbtn: Acknowledge interrupts

[Andy Shevchenko]

Some platforms require interrupt to be acknowledged by clearing
MSIC_PWRBTNM bit in interrupt level 1 mask register.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
---
 drivers/platform/x86/intel_mid_powerbtn.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/platform/x86/intel_mid_powerbtn.c b/drivers/platform/x86/intel_mid_powerbtn.c
index 596ac9f3e89d..ac02a0b8bef3 100644
--- a/drivers/platform/x86/intel_mid_powerbtn.c
+++ b/drivers/platform/x86/intel_mid_powerbtn.c
@@ -94,6 +94,7 @@ static irqreturn_t mid_pb_isr(int irq, void *dev_id)
 		input_sync(input);
 	}
 
+	ddata->ack(ddata);
 	return IRQ_HANDLED;
 }
 
-- 
2.11.0