[PATCH v6 0/2] x86/apic: x2apic write eoi msr notrace

From: Wanpeng Li
Date: Thu Oct 27 2016 - 00:38:57 EST


| RCU used illegally from idle CPU!
| rcu_scheduler_active = 1, debug_locks = 0
| RCU used illegally from extended quiescent state!
| no locks held by swapper/1/0.
|
| [<ffffffff9d492b95>] do_trace_write_msr+0x135/0x140
| [<ffffffff9d06f860>] native_write_msr+0x20/0x30
| [<ffffffff9d065fad>] native_apic_msr_eoi_write+0x1d/0x30
| [<ffffffff9d05bd1d>] smp_reschedule_interrupt+0x1d/0x30
| [<ffffffff9d8daec6>] reschedule_interrupt+0x96/0xa0

Reschedule interrupt may be called in cpu idle state. This causes lockdep
check warning above.

As Peterz pointed out:

| The thing is, many many smp_reschedule_interrupt() invocations don't
| actually execute anything much at all and are only send to tickle the
| return to user path (which does the actual preemption).
|
| Having to do the whole irq_enter/irq_exit dance just for this unlikely
| debug case totally blows.

This patchset adds x2apic write eoi msr notrace to avoid the debug codes
splash and reverts irq_enter/irq_exit dance to avoid to make a very frequent
interrupt slower because of debug code.

v5 -> v6:
* split the patch
* don't duplicate the inline asm

v4 -> v5:
* add notrace mark

v3 -> v4:
* add notrace mark

v2 -> v3:
* revert irq_enter/irq_exit() since it is merged

v1 -> v2:
* add write msr notrace to avoid debug codes splash instead of slowdown
a very frequent interrupt


Wanpeng Li (2):
x86/msr: Add write msr notrace
x86/apic: x2apic write eoi msr notrace

arch/x86/include/asm/apic.h | 3 ++-
arch/x86/include/asm/msr.h | 14 +++++++++++++-
arch/x86/kernel/apic/apic.c | 1 +
arch/x86/kernel/kvm.c | 4 ++--
arch/x86/kernel/smp.c | 2 --
5 files changed, 18 insertions(+), 6 deletions(-)

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1.9.1