Re: [PATCH 1/3] perf/x86/intel/bts: Fix confused ordering of PMU callbacks

From: Alexander Shishkin
Date: Mon Aug 29 2016 - 10:44:02 EST


Peter Zijlstra <peterz@xxxxxxxxxxxxx> writes:

> On Wed, Aug 24, 2016 at 05:15:54PM +0300, Alexander Shishkin wrote:
>> @@ -221,10 +245,13 @@ static void __bts_event_start(struct perf_event *event)
>>
>> /*
>> * local barrier to make sure that ds configuration made it
>> - * before we enable BTS
>> + * before we enable BTS and bts::state goes ACTIVE
>> */
>> wmb();
>>
>> + /* INACTIVE/STOPPED -> ACTIVE */
>> + WRITE_ONCE(bts->state, BTS_STATE_ACTIVE);
>> +
>> intel_pmu_enable_bts(config);
>>
>> }
>
> Alexander, were you going to post a new version of this patch without
> the barrier confusion?

Yes, only the testcase exploded again over the weekend, looking at it
again.

Regards,
--
Alex