Problem with atomic accesses in pstore on some ARM CPUs

From: Guenter Roeck
Date: Mon Aug 15 2016 - 19:19:19 EST


Hi,

we are having a problem with atomic accesses in pstore on some ARM
CPUs (specifically rk3288 and rk3399). With those chips, atomic
accesses fail with both pgprot_noncached and pgprot_writecombine
memory. Atomic accesses do work when selecting PAGE_KERNEL protection.

Debugging on rk3399 shows the following crash.

[ 0.912669] Bad mode in Error handler detected, code 0xbf000002 -- SError
[ 0.920140] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 4.4.14 #389
[ 0.926838] Hardware name: Google Kevin (DT)
[ 0.931533] task: ffffffc0edfe0000 ti: ffffffc0edf7c000 task.ti:
ffffffc0edf 7c000
[ 0.939780] PC is at __ll_sc___cmpxchg_case_mb_4+0x2c/0x5c
[ 0.945811] LR is at 0x1

The "solution" for this problem in various Chrome OS releases is to
disable atomic accesses in pstore entirely, which seems to be a bit
brute-force. Question is what a proper upstream-acceptable solution
might be. Introduce another memory type to select PAGE_KERNEL ? Is
there some means to determine if atomic operations are supported with
a given protection mask, maybe ? Anything else ?

Thanks,
Guenter