Re: [PATCH] x86/microcode/intel: Quieten down microcode updates on large systems

From: Borislav Petkov
Date: Fri Jun 10 2016 - 06:05:59 EST


On Thu, Jun 09, 2016 at 06:41:41AM -0700, Andi Kleen wrote:
> From: Andi Kleen <ak@xxxxxxxxxxxxxxx>
>
> On large systems the microcode driver is very noisy, because it prints
> a line for each CPU. The lines are redundant because because usually
> all CPUs are updated to the same microcode revision.
>
> All other subsystems have been patched previously to not print
> a line for each CPU. Only the microcode driver is left.
>
> Only print an microcode revision update when something changed. This results
> in typically only a single line being printed.
>
> v2: Change message to "One or more CPUs"
> Signed-off-by: Andi Kleen <ak@xxxxxxxxxxxxxxx>
> ---
> arch/x86/kernel/cpu/microcode/intel.c | 25 ++++++++++++++++++-------
> 1 file changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
> index cbb3cf0..54f5f6c 100644
> --- a/arch/x86/kernel/cpu/microcode/intel.c
> +++ b/arch/x86/kernel/cpu/microcode/intel.c
> @@ -794,6 +794,7 @@ void reload_ucode_intel(void)
>
> static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
> {
> + static struct cpu_signature prev;
> struct cpuinfo_x86 *c = &cpu_data(cpu_num);
> unsigned int val[2];
>
> @@ -808,8 +809,14 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
> }
>
> csig->rev = c->microcode;
> - pr_info("CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n",
> - cpu_num, csig->sig, csig->pf, csig->rev);
> +
> + /* No extra locking on prev, races are harmless. */
> + if (csig->sig != prev.sig || csig->pf != prev.pf ||
> + csig->rev != prev.rev) {
> + pr_info("One or more CPUs sig=0x%x, pf=0x%x, revision=0x%x\n",

This "One or more CPUs" is just silly. I've removed it while applying.
This way, there's no mentioning of CPUs and people can check
/proc/cpuinfo for that.

Thanks.

--
Regards/Gruss,
Boris.

ECO tip #101: Trim your mails when you reply.