Re: [PATCH] OMAPDSS: HDMI5: Change DDC timings

From: Tomi Valkeinen
Date: Thu Apr 21 2016 - 10:38:52 EST


Hi,

On 21/04/16 03:02, J.D. Schroeder wrote:
> From: "Lodes, Jim" <jim.lodes@xxxxxxxxxx>
>
> The DDC scl high and low times were set to the minimum values
> from the i2c specification, but the i2c specification takes into
> account the rise time and fall time to calculate the frequency.
> To pass HDMI certification DDC can not exceed 100kHz therefore in
> a system where the rise times and fall times are negligible the high
> and low times for scl need to be 10us.

Thanks, makes sense. Did you measure the rise & fall times? Do you get
more or less exactly 100kHz with the new times?

> Signed-off-by: Lodes, Jim <jim.lodes@xxxxxxxxxx>

The email format should be

Firstname Lastname <firstname.lastname@xxxxxxx>

Or something similar, but not "Lastname, Firstname"

Tomi

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