[PATCH v3 13/13] MIPS: mm: Panic if an XPA kernel is run without RIXI

[Paul Burton]

XPA kernels hardcode for the presence of RIXI - the PTE format & its
handling presume RI & XI bits. Make this dependence explicit by panicing
if we run on a system that violates it.

Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx>
Reviewed-by: James Hogan <james.hogan@xxxxxxxxxx>

---

Changes in v3:
- Remove newline in panic() call.

Changes in v2:
- New patch, in response to clarification on patch 5.

 arch/mips/mm/tlbex.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 3f1a8a2..2afc710 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -2395,6 +2395,9 @@ void build_tlb_refill_handler(void)
 	 */
 	static int run_once = 0;
 
+	if (config_enabled(CONFIG_XPA) && !cpu_has_rixi)
+		panic("Kernels supporting XPA currently require CPUs with RIXI");
+
 	output_pgtable_bits_defines();
 	check_pabits();
 
-- 
2.8.0